1 /*
2 * FreeRTOS Kernel V10.6.2
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
26 *
27 */
28
29 /*-----------------------------------------------------------
30 * Implementation of functions defined in portable.h for the RX600 port.
31 *----------------------------------------------------------*/
32
33 /* Scheduler includes. */
34 #include "FreeRTOS.h"
35 #include "task.h"
36
37 /* Library includes. */
38 #include "string.h"
39
40 /* Hardware specifics. */
41 #if defined( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H ) && ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
42 #include "platform.h"
43 #else
44 #include "iodefine.h"
45 #endif
46
47 /*-----------------------------------------------------------*/
48
49 /* Tasks should start with interrupts enabled and in Supervisor mode, therefore
50 PSW is set with U and I set, and PM and IPL clear. */
51 #define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
52 #define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )
53
54 /*-----------------------------------------------------------*/
55
56 /* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
57 and therefore installed in the vector table, when the FreeRTOS code is built
58 as a library. */
59 extern BaseType_t vSoftwareInterruptEntry;
60 const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
61
62 /*-----------------------------------------------------------*/
63
64 /*
65 * Function to start the first task executing - written in asm code as direct
66 * access to registers is required.
67 */
68 static void prvStartFirstTask( void );
69
70 /*
71 * Software interrupt handler. Performs the actual context switch (saving and
72 * restoring of registers). Written in asm code as direct register access is
73 * required.
74 */
75 static void prvYieldHandler( void );
76
77 /*
78 * The entry point for the software interrupt handler. This is the function
79 * that calls the inline asm function prvYieldHandler(). It is installed in
80 * the vector table, but the code that installs it is in prvYieldHandler rather
81 * than using a #pragma.
82 */
83 void vSoftwareInterruptISR( void );
84
85 /*-----------------------------------------------------------*/
86
87 /* This is accessed by the inline assembler functions so is file scope for
88 convenience. */
89 extern void *pxCurrentTCB;
90 extern void vTaskSwitchContext( void );
91
92 /*-----------------------------------------------------------*/
93
94 /*
95 * See header file for description.
96 */
pxPortInitialiseStack(StackType_t * pxTopOfStack,TaskFunction_t pxCode,void * pvParameters)97 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
98 {
99 /* R0 is not included as it is the stack pointer. */
100
101 *pxTopOfStack = 0x00;
102 pxTopOfStack--;
103 *pxTopOfStack = portINITIAL_PSW;
104 pxTopOfStack--;
105 *pxTopOfStack = ( StackType_t ) pxCode;
106
107 /* When debugging it can be useful if every register is set to a known
108 value. Otherwise code space can be saved by just setting the registers
109 that need to be set. */
110 #ifdef USE_FULL_REGISTER_INITIALISATION
111 {
112 pxTopOfStack--;
113 *pxTopOfStack = 0xffffffff; /* r15. */
114 pxTopOfStack--;
115 *pxTopOfStack = 0xeeeeeeee;
116 pxTopOfStack--;
117 *pxTopOfStack = 0xdddddddd;
118 pxTopOfStack--;
119 *pxTopOfStack = 0xcccccccc;
120 pxTopOfStack--;
121 *pxTopOfStack = 0xbbbbbbbb;
122 pxTopOfStack--;
123 *pxTopOfStack = 0xaaaaaaaa;
124 pxTopOfStack--;
125 *pxTopOfStack = 0x99999999;
126 pxTopOfStack--;
127 *pxTopOfStack = 0x88888888;
128 pxTopOfStack--;
129 *pxTopOfStack = 0x77777777;
130 pxTopOfStack--;
131 *pxTopOfStack = 0x66666666;
132 pxTopOfStack--;
133 *pxTopOfStack = 0x55555555;
134 pxTopOfStack--;
135 *pxTopOfStack = 0x44444444;
136 pxTopOfStack--;
137 *pxTopOfStack = 0x33333333;
138 pxTopOfStack--;
139 *pxTopOfStack = 0x22222222;
140 pxTopOfStack--;
141 }
142 #else
143 {
144 pxTopOfStack -= 15;
145 }
146 #endif
147
148 *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
149 pxTopOfStack--;
150 *pxTopOfStack = portINITIAL_FPSW;
151 pxTopOfStack--;
152 *pxTopOfStack = 0x11111111; /* Accumulator 0. */
153 pxTopOfStack--;
154 *pxTopOfStack = 0x22222222; /* Accumulator 0. */
155 pxTopOfStack--;
156 *pxTopOfStack = 0x33333333; /* Accumulator 0. */
157 pxTopOfStack--;
158 *pxTopOfStack = 0x44444444; /* Accumulator 1. */
159 pxTopOfStack--;
160 *pxTopOfStack = 0x55555555; /* Accumulator 1. */
161 pxTopOfStack--;
162 *pxTopOfStack = 0x66666666; /* Accumulator 1. */
163
164 return pxTopOfStack;
165 }
166 /*-----------------------------------------------------------*/
167
xPortStartScheduler(void)168 BaseType_t xPortStartScheduler( void )
169 {
170 extern void vApplicationSetupTimerInterrupt( void );
171
172 /* Use pxCurrentTCB just so it does not get optimised away. */
173 if( pxCurrentTCB != NULL )
174 {
175 /* Call an application function to set up the timer that will generate the
176 tick interrupt. This way the application can decide which peripheral to
177 use. A demo application is provided to show a suitable example. */
178 vApplicationSetupTimerInterrupt();
179
180 /* Enable the software interrupt. */
181 _IEN( _ICU_SWINT ) = 1;
182
183 /* Ensure the software interrupt is clear. */
184 _IR( _ICU_SWINT ) = 0;
185
186 /* Ensure the software interrupt is set to the kernel priority. */
187 _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
188
189 /* Start the first task. */
190 prvStartFirstTask();
191 }
192
193 /* Just to make sure the function is not optimised away. */
194 ( void ) vSoftwareInterruptISR();
195
196 /* Should not get here. */
197 return pdFAIL;
198 }
199 /*-----------------------------------------------------------*/
200
201 #pragma inline_asm prvStartFirstTask
prvStartFirstTask(void)202 static void prvStartFirstTask( void )
203 {
204 /* When starting the scheduler there is nothing that needs moving to the
205 interrupt stack because the function is not called from an interrupt.
206 Just ensure the current stack is the user stack. */
207 SETPSW U
208
209 /* Obtain the location of the stack associated with which ever task
210 pxCurrentTCB is currently pointing to. */
211 MOV.L #_pxCurrentTCB, R15
212 MOV.L [R15], R15
213 MOV.L [R15], R0
214
215 /* Restore the registers from the stack of the task pointed to by
216 pxCurrentTCB. */
217 POP R15
218 MVTACLO R15, A0 /* Accumulator low 32 bits. */
219 POP R15
220 MVTACHI R15, A0 /* Accumulator high 32 bits. */
221 POP R15
222 MVTACGU R15, A0 /* Accumulator guard. */
223 POP R15
224 MVTACLO R15, A1 /* Accumulator low 32 bits. */
225 POP R15
226 MVTACHI R15, A1 /* Accumulator high 32 bits. */
227 POP R15
228 MVTACGU R15, A1 /* Accumulator guard. */
229 POP R15
230 MVTC R15,FPSW /* Floating point status word. */
231 POPM R1-R15 /* R1 to R15 - R0 is not included as it is the SP. */
232 RTE /* This pops the remaining registers. */
233 NOP
234 NOP
235 }
236 /*-----------------------------------------------------------*/
237
238 #pragma interrupt ( vTickISR( vect = _VECT( configTICK_VECTOR ), enable ) )
vTickISR(void)239 void vTickISR( void )
240 {
241 /* Increment the tick, and perform any processing the new tick value
242 necessitates. */
243 set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
244 {
245 if( xTaskIncrementTick() != pdFALSE )
246 {
247 taskYIELD();
248 }
249 }
250 set_ipl( configKERNEL_INTERRUPT_PRIORITY );
251 }
252 /*-----------------------------------------------------------*/
253
vSoftwareInterruptISR(void)254 void vSoftwareInterruptISR( void )
255 {
256 prvYieldHandler();
257 }
258 /*-----------------------------------------------------------*/
259
260 #pragma inline_asm prvYieldHandler
prvYieldHandler(void)261 static void prvYieldHandler( void )
262 {
263 /* Re-enable interrupts. */
264 SETPSW I
265
266 /* Move the data that was automatically pushed onto the interrupt stack when
267 the interrupt occurred from the interrupt stack to the user stack.
268
269 R15 is saved before it is clobbered. */
270 PUSH.L R15
271
272 /* Read the user stack pointer. */
273 MVFC USP, R15
274
275 /* Move the address down to the data being moved. */
276 SUB #12, R15
277 MVTC R15, USP
278
279 /* Copy the data across. */
280 MOV.L [ R0 ], [ R15 ] ; R15
281 MOV.L 4[ R0 ], 4[ R15 ] ; PC
282 MOV.L 8[ R0 ], 8[ R15 ] ; PSW
283
284 /* Move the interrupt stack pointer to its new correct position. */
285 ADD #12, R0
286
287 /* All the rest of the registers are saved directly to the user stack. */
288 SETPSW U
289
290 /* Save the rest of the general registers (R15 has been saved already). */
291 PUSHM R1-R14
292
293 /* Save the FPSW and accumulators. */
294 MVFC FPSW, R15
295 PUSH.L R15
296 MVFACGU #0, A1, R15
297 PUSH.L R15
298 MVFACHI #0, A1, R15
299 PUSH.L R15
300 MVFACLO #0, A1, R15 ; Low order word.
301 PUSH.L R15
302 MVFACGU #0, A0, R15
303 PUSH.L R15
304 MVFACHI #0, A0, R15
305 PUSH.L R15
306 MVFACLO #0, A0, R15 ; Low order word.
307 PUSH.L R15
308
309 /* Save the stack pointer to the TCB. */
310 MOV.L #_pxCurrentTCB, R15
311 MOV.L [ R15 ], R15
312 MOV.L R0, [ R15 ]
313
314 /* Ensure the interrupt mask is set to the syscall priority while the kernel
315 structures are being accessed. */
316 MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
317
318 /* Select the next task to run. */
319 BSR.A _vTaskSwitchContext
320
321 /* Reset the interrupt mask as no more data structure access is required. */
322 MVTIPL #configKERNEL_INTERRUPT_PRIORITY
323
324 /* Load the stack pointer of the task that is now selected as the Running
325 state task from its TCB. */
326 MOV.L #_pxCurrentTCB,R15
327 MOV.L [ R15 ], R15
328 MOV.L [ R15 ], R0
329
330 /* Restore the context of the new task. The PSW (Program Status Word) and
331 PC will be popped by the RTE instruction. */
332 POP R15
333 MVTACLO R15, A0 /* Accumulator low 32 bits. */
334 POP R15
335 MVTACHI R15, A0 /* Accumulator high 32 bits. */
336 POP R15
337 MVTACGU R15, A0 /* Accumulator guard. */
338 POP R15
339 MVTACLO R15, A1 /* Accumulator low 32 bits. */
340 POP R15
341 MVTACHI R15, A1 /* Accumulator high 32 bits. */
342 POP R15
343 MVTACGU R15, A1 /* Accumulator guard. */
344 POP R15
345 MVTC R15,FPSW
346 POPM R1-R15
347 RTE
348 NOP
349 NOP
350 }
351 /*-----------------------------------------------------------*/
352
vPortEndScheduler(void)353 void vPortEndScheduler( void )
354 {
355 /* Not implemented in ports where there is nothing to return to.
356 Artificially force an assert. */
357 configASSERT( pxCurrentTCB == NULL );
358
359 /* The following line is just to prevent the symbol getting optimised away. */
360 ( void ) vTaskSwitchContext();
361 }
362 /*-----------------------------------------------------------*/
363
