1 /*
2 * FreeRTOS Kernel V10.6.2
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
26 *
27 */
28
29
30 /* Standard includes. */
31 #include <stdlib.h>
32
33 /* Scheduler includes. */
34 #include "FreeRTOS.h"
35 #include "task.h"
36
37 /* Constants required to setup the initial task context. */
38 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
39 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
40 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
41 #define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
42
43 /* Constants required to setup the tick ISR. */
44 #define portENABLE_TIMER ( ( uint8_t ) 0x01 )
45 #define portPRESCALE_VALUE 0x00
46 #define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
47 #define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
48
49 /* Constants required to setup the VIC for the tick ISR. */
50 #define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )
51 #define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )
52 #define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )
53
54 /* Constants required to handle interrupts. */
55 #define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )
56 #define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )
57
58 /*-----------------------------------------------------------*/
59
60 /* The code generated by the Keil compiler does not maintain separate
61 stack and frame pointers. The portENTER_CRITICAL macro cannot therefore
62 use the stack as per other ports. Instead a variable is used to keep
63 track of the critical section nesting. This variable has to be stored
64 as part of the task context and must be initialised to a non zero value. */
65
66 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
67 volatile uint32_t ulCriticalNesting = 9999UL;
68
69 /*-----------------------------------------------------------*/
70
71 /* Setup the timer to generate the tick interrupts. */
72 static void prvSetupTimerInterrupt( void );
73
74 /*
75 * The scheduler can only be started from ARM mode, so
76 * vPortStartFirstSTask() is defined in portISR.c.
77 */
78 extern __asm void vPortStartFirstTask( void );
79
80 /*-----------------------------------------------------------*/
81
82 /*
83 * See header file for description.
84 */
pxPortInitialiseStack(StackType_t * pxTopOfStack,TaskFunction_t pxCode,void * pvParameters)85 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
86 {
87 StackType_t *pxOriginalTOS;
88
89 /* Setup the initial stack of the task. The stack is set exactly as
90 expected by the portRESTORE_CONTEXT() macro.
91
92 Remember where the top of the (simulated) stack is before we place
93 anything on it. */
94 pxOriginalTOS = pxTopOfStack;
95
96 /* To ensure asserts in tasks.c don't fail, although in this case the assert
97 is not really required. */
98 pxTopOfStack--;
99
100 /* First on the stack is the return address - which in this case is the
101 start of the task. The offset is added to make the return address appear
102 as it would within an IRQ ISR. */
103 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
104 pxTopOfStack--;
105
106 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
107 pxTopOfStack--;
108 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
109 pxTopOfStack--;
110 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
111 pxTopOfStack--;
112 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
113 pxTopOfStack--;
114 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
115 pxTopOfStack--;
116 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
117 pxTopOfStack--;
118 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
119 pxTopOfStack--;
120 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
121 pxTopOfStack--;
122 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
123 pxTopOfStack--;
124 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
125 pxTopOfStack--;
126 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
127 pxTopOfStack--;
128 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
129 pxTopOfStack--;
130 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
131 pxTopOfStack--;
132 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
133 pxTopOfStack--;
134 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
135 pxTopOfStack--;
136
137 /* The last thing onto the stack is the status register, which is set for
138 system mode, with interrupts enabled. */
139 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
140
141 if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )
142 {
143 /* We want the task to start in thumb mode. */
144 *pxTopOfStack |= portTHUMB_MODE_BIT;
145 }
146
147 pxTopOfStack--;
148
149 /* The code generated by the Keil compiler does not maintain separate
150 stack and frame pointers. The portENTER_CRITICAL macro cannot therefore
151 use the stack as per other ports. Instead a variable is used to keep
152 track of the critical section nesting. This variable has to be stored
153 as part of the task context and is initially set to zero. */
154 *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
155
156 return pxTopOfStack;
157 }
158 /*-----------------------------------------------------------*/
159
xPortStartScheduler(void)160 BaseType_t xPortStartScheduler( void )
161 {
162 /* Start the timer that generates the tick ISR. */
163 prvSetupTimerInterrupt();
164
165 /* Start the first task. This is done from portISR.c as ARM mode must be
166 used. */
167 vPortStartFirstTask();
168
169 /* Should not get here! */
170 return 0;
171 }
172 /*-----------------------------------------------------------*/
173
vPortEndScheduler(void)174 void vPortEndScheduler( void )
175 {
176 /* It is unlikely that the ARM port will require this function as there
177 is nothing to return to. If this is required - stop the tick ISR then
178 return back to main. */
179 }
180 /*-----------------------------------------------------------*/
181
182 #if configUSE_PREEMPTION == 0
183
184 /*
185 * The cooperative scheduler requires a normal IRQ service routine to
186 * simply increment the system tick.
187 */
188 void vNonPreemptiveTick( void ) __irq;
vNonPreemptiveTick(void)189 void vNonPreemptiveTick( void ) __irq
190 {
191 /* Increment the tick count - this may make a delaying task ready
192 to run - but a context switch is not performed. */
193 xTaskIncrementTick();
194
195 T0IR = portTIMER_MATCH_ISR_BIT; /* Clear the timer event */
196 VICVectAddr = portCLEAR_VIC_INTERRUPT; /* Acknowledge the Interrupt */
197 }
198
199 #else
200
201 /*
202 **************************************************************************
203 * The preemptive scheduler ISR is written in assembler and can be found
204 * in the portASM.s file. This will only get used if portUSE_PREEMPTION
205 * is set to 1 in portmacro.h
206 **************************************************************************
207 */
208
209 void vPreemptiveTick( void );
210
211 #endif
212 /*-----------------------------------------------------------*/
213
prvSetupTimerInterrupt(void)214 static void prvSetupTimerInterrupt( void )
215 {
216 uint32_t ulCompareMatch;
217
218 /* A 1ms tick does not require the use of the timer prescale. This is
219 defaulted to zero but can be used if necessary. */
220 T0PR = portPRESCALE_VALUE;
221
222 /* Calculate the match value required for our wanted tick rate. */
223 ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
224
225 /* Protect against divide by zero. Using an if() statement still results
226 in a warning - hence the #if. */
227 #if portPRESCALE_VALUE != 0
228 {
229 ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
230 }
231 #endif
232
233 T0MR0 = ulCompareMatch;
234
235 /* Generate tick with timer 0 compare match. */
236 T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
237
238 /* Setup the VIC for the timer. */
239 VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
240 VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
241
242 /* The ISR installed depends on whether the preemptive or cooperative
243 scheduler is being used. */
244 #if configUSE_PREEMPTION == 1
245 {
246 VICVectAddr0 = ( uint32_t ) vPreemptiveTick;
247 }
248 #else
249 {
250 VICVectAddr0 = ( uint32_t ) vNonPreemptiveTick;
251 }
252 #endif
253
254 VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
255
256 /* Start the timer - interrupts are disabled when this function is called
257 so it is okay to do this here. */
258 T0TCR = portENABLE_TIMER;
259 }
260 /*-----------------------------------------------------------*/
261
vPortEnterCritical(void)262 void vPortEnterCritical( void )
263 {
264 /* Disable interrupts as per portDISABLE_INTERRUPTS(); */
265 __disable_irq();
266
267 /* Now interrupts are disabled ulCriticalNesting can be accessed
268 directly. Increment ulCriticalNesting to keep a count of how many times
269 portENTER_CRITICAL() has been called. */
270 ulCriticalNesting++;
271 }
272 /*-----------------------------------------------------------*/
273
vPortExitCritical(void)274 void vPortExitCritical( void )
275 {
276 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
277 {
278 /* Decrement the nesting count as we are leaving a critical section. */
279 ulCriticalNesting--;
280
281 /* If the nesting level has reached zero then interrupts should be
282 re-enabled. */
283 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
284 {
285 /* Enable interrupts as per portEXIT_CRITICAL(). */
286 __enable_irq();
287 }
288 }
289 }
290 /*-----------------------------------------------------------*/
291
