1 /*
2 * FreeRTOS Kernel V10.6.2
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
26 *
27 */
28
29 /*-----------------------------------------------------------
30 * Implementation of functions defined in portable.h for the ST STR71x ARM7
31 * port.
32 *----------------------------------------------------------*/
33
34 /* Library includes. */
35 #include "wdg.h"
36 #include "eic.h"
37
38 /* Standard includes. */
39 #include <stdlib.h>
40
41 /* Scheduler includes. */
42 #include "FreeRTOS.h"
43 #include "task.h"
44
45 /* Constants required to setup the initial stack. */
46 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
47 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
48 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
49
50 /* Constants required to handle critical sections. */
51 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
52
53 #define portMICROS_PER_SECOND 1000000
54
55 /*-----------------------------------------------------------*/
56
57 /* Setup the watchdog to generate the tick interrupts. */
58 static void prvSetupTimerInterrupt( void );
59
60 /* ulCriticalNesting will get set to zero when the first task starts. It
61 cannot be initialised to 0 as this will cause interrupts to be enabled
62 during the kernel initialisation process. */
63 uint32_t ulCriticalNesting = ( uint32_t ) 9999;
64
65 /* Tick interrupt routines for cooperative and preemptive operation
66 respectively. The preemptive version is not defined as __irq as it is called
67 from an asm wrapper function. */
68 __arm __irq void vPortNonPreemptiveTick( void );
69 void vPortPreemptiveTick( void );
70
71 /*-----------------------------------------------------------*/
72
73 /*
74 * Initialise the stack of a task to look exactly as if a call to
75 * portSAVE_CONTEXT had been called.
76 *
77 * See header file for description.
78 */
pxPortInitialiseStack(StackType_t * pxTopOfStack,TaskFunction_t pxCode,void * pvParameters)79 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
80 {
81 StackType_t *pxOriginalTOS;
82
83 pxOriginalTOS = pxTopOfStack;
84
85 /* To ensure asserts in tasks.c don't fail, although in this case the assert
86 is not really required. */
87 pxTopOfStack--;
88
89 /* Setup the initial stack of the task. The stack is set exactly as
90 expected by the portRESTORE_CONTEXT() macro. */
91
92 /* First on the stack is the return address - which in this case is the
93 start of the task. The offset is added to make the return address appear
94 as it would within an IRQ ISR. */
95 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
96 pxTopOfStack--;
97
98 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
99 pxTopOfStack--;
100 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
101 pxTopOfStack--;
102 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
103 pxTopOfStack--;
104 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
105 pxTopOfStack--;
106 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
107 pxTopOfStack--;
108 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
109 pxTopOfStack--;
110 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
111 pxTopOfStack--;
112 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
113 pxTopOfStack--;
114 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
115 pxTopOfStack--;
116 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
117 pxTopOfStack--;
118 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
119 pxTopOfStack--;
120 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
121 pxTopOfStack--;
122 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
123 pxTopOfStack--;
124 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
125 pxTopOfStack--;
126
127 /* When the task starts is will expect to find the function parameter in
128 R0. */
129 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
130 pxTopOfStack--;
131
132 /* The status register is set for system mode, with interrupts enabled. */
133 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
134
135 if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )
136 {
137 /* We want the task to start in thumb mode. */
138 *pxTopOfStack |= portTHUMB_MODE_BIT;
139 }
140
141 pxTopOfStack--;
142
143 /* Interrupt flags cannot always be stored on the stack and will
144 instead be stored in a variable, which is then saved as part of the
145 tasks context. */
146 *pxTopOfStack = portNO_CRITICAL_NESTING;
147
148 return pxTopOfStack;
149 }
150 /*-----------------------------------------------------------*/
151
xPortStartScheduler(void)152 BaseType_t xPortStartScheduler( void )
153 {
154 extern void vPortStartFirstTask( void );
155
156 /* Start the timer that generates the tick ISR. Interrupts are disabled
157 here already. */
158 prvSetupTimerInterrupt();
159
160 /* Start the first task. */
161 vPortStartFirstTask();
162
163 /* Should not get here! */
164 return 0;
165 }
166 /*-----------------------------------------------------------*/
167
vPortEndScheduler(void)168 void vPortEndScheduler( void )
169 {
170 /* It is unlikely that the ARM port will require this function as there
171 is nothing to return to. */
172 }
173 /*-----------------------------------------------------------*/
174
175 /* The cooperative scheduler requires a normal IRQ service routine to
176 simply increment the system tick. */
vPortNonPreemptiveTick(void)177 __arm __irq void vPortNonPreemptiveTick( void )
178 {
179 /* Increment the tick count - which may wake some tasks but as the
180 preemptive scheduler is not being used any woken task is not given
181 processor time no matter what its priority. */
182 xTaskIncrementTick();
183
184 /* Clear the interrupt in the watchdog and EIC. */
185 WDG->SR = 0x0000;
186 portCLEAR_EIC();
187 }
188 /*-----------------------------------------------------------*/
189
190 /* This function is called from an asm wrapper, so does not require the __irq
191 keyword. */
vPortPreemptiveTick(void)192 void vPortPreemptiveTick( void )
193 {
194 /* Increment the tick counter. */
195 if( xTaskIncrementTick() != pdFALSE )
196 {
197 /* Select a new task to execute. */
198 vTaskSwitchContext();
199 }
200
201 /* Clear the interrupt in the watchdog and EIC. */
202 WDG->SR = 0x0000;
203 portCLEAR_EIC();
204 }
205 /*-----------------------------------------------------------*/
206
prvSetupTimerInterrupt(void)207 static void prvSetupTimerInterrupt( void )
208 {
209 /* Set the watchdog up to generate a periodic tick. */
210 WDG_ECITConfig( DISABLE );
211 WDG_CntOnOffConfig( DISABLE );
212 WDG_PeriodValueConfig( portMICROS_PER_SECOND / configTICK_RATE_HZ );
213
214 /* Setup the tick interrupt in the EIC. */
215 EIC_IRQChannelPriorityConfig( WDG_IRQChannel, 1 );
216 EIC_IRQChannelConfig( WDG_IRQChannel, ENABLE );
217 EIC_IRQConfig( ENABLE );
218 WDG_ECITConfig( ENABLE );
219
220 /* Start the timer - interrupts are actually disabled at this point so
221 it is safe to do this here. */
222 WDG_CntOnOffConfig( ENABLE );
223 }
224 /*-----------------------------------------------------------*/
225
vPortEnterCritical(void)226 __arm __interwork void vPortEnterCritical( void )
227 {
228 /* Disable interrupts first! */
229 __disable_interrupt();
230
231 /* Now interrupts are disabled ulCriticalNesting can be accessed
232 directly. Increment ulCriticalNesting to keep a count of how many times
233 portENTER_CRITICAL() has been called. */
234 ulCriticalNesting++;
235 }
236 /*-----------------------------------------------------------*/
237
vPortExitCritical(void)238 __arm __interwork void vPortExitCritical( void )
239 {
240 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
241 {
242 /* Decrement the nesting count as we are leaving a critical section. */
243 ulCriticalNesting--;
244
245 /* If the nesting level has reached zero then interrupts should be
246 re-enabled. */
247 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
248 {
249 __enable_interrupt();
250 }
251 }
252 }
253 /*-----------------------------------------------------------*/
254
