1/* 2 * FreeRTOS Kernel V10.6.2 3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 * 5 * SPDX-License-Identifier: MIT 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 * this software and associated documentation files (the "Software"), to deal in 9 * the Software without restriction, including without limitation the rights to 10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 * the Software, and to permit persons to whom the Software is furnished to do so, 12 * subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in all 15 * copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * https://www.FreeRTOS.org 25 * https://github.com/FreeRTOS 26 * 27 */ 28 29#include <FreeRTOSConfig.h> 30 31 RSEG CODE:CODE(2) 32 thumb 33 34 EXTERN pxCurrentTCB 35 EXTERN vTaskSwitchContext 36 37 PUBLIC xPortPendSVHandler 38 PUBLIC vPortSVCHandler 39 PUBLIC vPortStartFirstTask 40 41 42 43/*-----------------------------------------------------------*/ 44 45xPortPendSVHandler: 46 mrs r0, psp 47 isb 48 ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */ 49 ldr r2, [r3] 50 51 stmdb r0!, {r4-r11} /* Save the remaining registers. */ 52 str r0, [r2] /* Save the new top of stack into the first member of the TCB. */ 53 54 stmdb sp!, {r3, r14} 55 mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY 56 msr basepri, r0 57 dsb 58 isb 59 bl vTaskSwitchContext 60 mov r0, #0 61 msr basepri, r0 62 ldmia sp!, {r3, r14} 63 64 ldr r1, [r3] 65 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */ 66 ldmia r0!, {r4-r11} /* Pop the registers. */ 67 msr psp, r0 68 isb 69 bx r14 70 71 72/*-----------------------------------------------------------*/ 73 74vPortSVCHandler: 75 /* Get the location of the current TCB. */ 76 ldr r3, =pxCurrentTCB 77 ldr r1, [r3] 78 ldr r0, [r1] 79 /* Pop the core registers. */ 80 ldmia r0!, {r4-r11} 81 msr psp, r0 82 isb 83 mov r0, #0 84 msr basepri, r0 85 orr r14, r14, #13 86 bx r14 87 88/*-----------------------------------------------------------*/ 89 90vPortStartFirstTask 91 /* Use the NVIC offset register to locate the stack. */ 92 ldr r0, =0xE000ED08 93 ldr r0, [r0] 94 ldr r0, [r0] 95 /* Set the msp back to the start of the stack. */ 96 msr msp, r0 97 /* Call SVC to start the first task, ensuring interrupts are enabled. */ 98 cpsie i 99 cpsie f 100 dsb 101 isb 102 svc 0 103 104 END 105
