1 /*
2  * FreeRTOS Kernel V11.1.0
3  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4  *
5  * SPDX-License-Identifier: MIT
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy of
8  * this software and associated documentation files (the "Software"), to deal in
9  * the Software without restriction, including without limitation the rights to
10  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11  * the Software, and to permit persons to whom the Software is furnished to do so,
12  * subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in all
15  * copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * https://www.FreeRTOS.org
25  * https://github.com/FreeRTOS
26  *
27  */
28 
29 /*-----------------------------------------------------------
30 * Implementation of functions defined in portable.h for the PPC405 port.
31 *----------------------------------------------------------*/
32 
33 
34 /* Scheduler includes. */
35 #include "FreeRTOS.h"
36 #include "task.h"
37 
38 /* Library includes. */
39 #include "xtime_l.h"
40 #include "xintc.h"
41 #include "xintc_i.h"
42 
43 /*-----------------------------------------------------------*/
44 
45 /* Definitions to set the initial MSR of each task. */
46 #define portCRITICAL_INTERRUPT_ENABLE    ( 1UL << 17UL )
47 #define portEXTERNAL_INTERRUPT_ENABLE    ( 1UL << 15UL )
48 #define portMACHINE_CHECK_ENABLE         ( 1UL << 12UL )
49 
50 #if configUSE_FPU == 1
51     #define portAPU_PRESENT              ( 1UL << 25UL )
52     #define portFCM_FPU_PRESENT          ( 1UL << 13UL )
53 #else
54     #define portAPU_PRESENT              ( 0UL )
55     #define portFCM_FPU_PRESENT          ( 0UL )
56 #endif
57 
58 #define portINITIAL_MSR                  ( portCRITICAL_INTERRUPT_ENABLE | portEXTERNAL_INTERRUPT_ENABLE | portMACHINE_CHECK_ENABLE | portAPU_PRESENT | portFCM_FPU_PRESENT )
59 
60 
61 extern const unsigned _SDA_BASE_;
62 extern const unsigned _SDA2_BASE_;
63 
64 /*-----------------------------------------------------------*/
65 
66 /*
67  * Setup the system timer to generate the tick interrupt.
68  */
69 static void prvSetupTimerInterrupt( void );
70 
71 /*
72  * The handler for the tick interrupt - defined in portasm.s.
73  */
74 extern void vPortTickISR( void );
75 
76 /*
77  * The handler for the yield function - defined in portasm.s.
78  */
79 extern void vPortYield( void );
80 
81 /*
82  * Function to start the scheduler running by starting the highest
83  * priority task that has thus far been created.
84  */
85 extern void vPortStartFirstTask( void );
86 
87 /*-----------------------------------------------------------*/
88 
89 /* Structure used to hold the state of the interrupt controller. */
90 static XIntc xInterruptController;
91 
92 /*-----------------------------------------------------------*/
93 
94 /*
95  * Initialise the stack of a task to look exactly as if the task had been
96  * interrupted.
97  *
98  * See the header file portable.h.
99  */
pxPortInitialiseStack(StackType_t * pxTopOfStack,TaskFunction_t pxCode,void * pvParameters)100 StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
101                                      TaskFunction_t pxCode,
102                                      void * pvParameters )
103 {
104     /* Place a known value at the bottom of the stack for debugging. */
105     *pxTopOfStack = 0xDEADBEEF;
106     pxTopOfStack--;
107 
108     /* EABI stack frame. */
109     pxTopOfStack -= 20; /* Previous backchain and LR, R31 to R4 inclusive. */
110 
111     /* Parameters in R13. */
112     *pxTopOfStack = ( StackType_t ) &_SDA_BASE_; /* address of the first small data area */
113     pxTopOfStack -= 10;
114 
115     /* Parameters in R3. */
116     *pxTopOfStack = ( StackType_t ) pvParameters;
117     pxTopOfStack--;
118 
119     /* Parameters in R2. */
120     *pxTopOfStack = ( StackType_t ) &_SDA2_BASE_; /* address of the second small data area */
121     pxTopOfStack--;
122 
123     /* R1 is the stack pointer so is omitted. */
124 
125     *pxTopOfStack = 0x10000001UL;                      /* R0. */
126     pxTopOfStack--;
127     *pxTopOfStack = 0x00000000UL;                      /* USPRG0. */
128     pxTopOfStack--;
129     *pxTopOfStack = 0x00000000UL;                      /* CR. */
130     pxTopOfStack--;
131     *pxTopOfStack = 0x00000000UL;                      /* XER. */
132     pxTopOfStack--;
133     *pxTopOfStack = 0x00000000UL;                      /* CTR. */
134     pxTopOfStack--;
135     *pxTopOfStack = ( StackType_t ) vPortEndScheduler; /* LR. */
136     pxTopOfStack--;
137     *pxTopOfStack = ( StackType_t ) pxCode;            /* SRR0. */
138     pxTopOfStack--;
139     *pxTopOfStack = portINITIAL_MSR;                   /* SRR1. */
140     pxTopOfStack--;
141     *pxTopOfStack = ( StackType_t ) vPortEndScheduler; /* Next LR. */
142     pxTopOfStack--;
143     *pxTopOfStack = 0x00000000UL;                      /* Backchain. */
144 
145     return pxTopOfStack;
146 }
147 /*-----------------------------------------------------------*/
148 
xPortStartScheduler(void)149 BaseType_t xPortStartScheduler( void )
150 {
151     prvSetupTimerInterrupt();
152     XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );
153     vPortStartFirstTask();
154 
155     /* Should not get here as the tasks are now running! */
156     return pdFALSE;
157 }
158 /*-----------------------------------------------------------*/
159 
vPortEndScheduler(void)160 void vPortEndScheduler( void )
161 {
162     /* Not implemented. */
163     for( ; ; )
164     {
165     }
166 }
167 /*-----------------------------------------------------------*/
168 
169 /*
170  * Hardware initialisation to generate the RTOS tick.
171  */
prvSetupTimerInterrupt(void)172 static void prvSetupTimerInterrupt( void )
173 {
174     const uint32_t ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
175 
176     XTime_PITClearInterrupt();
177     XTime_FITClearInterrupt();
178     XTime_WDTClearInterrupt();
179     XTime_WDTDisableInterrupt();
180     XTime_FITDisableInterrupt();
181 
182     XExc_RegisterHandler( XEXC_ID_PIT_INT, ( XExceptionHandler ) vPortTickISR, ( void * ) 0 );
183 
184     XTime_PITEnableAutoReload();
185     XTime_PITSetInterval( ulInterval );
186     XTime_PITEnableInterrupt();
187 }
188 /*-----------------------------------------------------------*/
189 
vPortISRHandler(void * pvNullDoNotUse)190 void vPortISRHandler( void * pvNullDoNotUse )
191 {
192     uint32_t ulInterruptStatus, ulInterruptMask = 1UL;
193     BaseType_t xInterruptNumber;
194     XIntc_Config * pxInterruptController;
195     XIntc_VectorTableEntry * pxTable;
196 
197     /* Just to remove compiler warning. */
198     ( void ) pvNullDoNotUse;
199 
200     /* Get the configuration by using the device ID - in this case it is
201      * assumed that only one interrupt controller is being used. */
202     pxInterruptController = &XIntc_ConfigTable[ XPAR_XPS_INTC_0_DEVICE_ID ];
203 
204     /* Which interrupts are pending? */
205     ulInterruptStatus = XIntc_mGetIntrStatus( pxInterruptController->BaseAddress );
206 
207     for( xInterruptNumber = 0; xInterruptNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS; xInterruptNumber++ )
208     {
209         if( ulInterruptStatus & 0x01UL )
210         {
211             /* Clear the pending interrupt. */
212             XIntc_mAckIntr( pxInterruptController->BaseAddress, ulInterruptMask );
213 
214             /* Call the registered handler. */
215             pxTable = &( pxInterruptController->HandlerTable[ xInterruptNumber ] );
216             pxTable->Handler( pxTable->CallBackRef );
217         }
218 
219         /* Check the next interrupt. */
220         ulInterruptMask <<= 0x01UL;
221         ulInterruptStatus >>= 0x01UL;
222 
223         /* Have we serviced all interrupts? */
224         if( ulInterruptStatus == 0UL )
225         {
226             break;
227         }
228     }
229 }
230 /*-----------------------------------------------------------*/
231 
vPortSetupInterruptController(void)232 void vPortSetupInterruptController( void )
233 {
234     extern void vPortISRWrapper( void );
235 
236     /* Perform all library calls necessary to initialise the exception table
237      * and interrupt controller.  This assumes only one interrupt controller is in
238      * use. */
239     XExc_mDisableExceptions( XEXC_NON_CRITICAL );
240     XExc_Init();
241 
242     /* The library functions save the context - we then jump to a wrapper to
243      * save the stack into the TCB.  The wrapper then calls the handler defined
244      * above. */
245     XExc_RegisterHandler( XEXC_ID_NON_CRITICAL_INT, ( XExceptionHandler ) vPortISRWrapper, NULL );
246     XIntc_Initialize( &xInterruptController, XPAR_XPS_INTC_0_DEVICE_ID );
247     XIntc_Start( &xInterruptController, XIN_REAL_MODE );
248 }
249 /*-----------------------------------------------------------*/
250 
xPortInstallInterruptHandler(uint8_t ucInterruptID,XInterruptHandler pxHandler,void * pvCallBackRef)251 BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID,
252                                          XInterruptHandler pxHandler,
253                                          void * pvCallBackRef )
254 {
255     BaseType_t xReturn = pdFAIL;
256 
257     /* This function is defined here so the scope of xInterruptController can
258      * remain within this file. */
259 
260     if( XST_SUCCESS == XIntc_Connect( &xInterruptController, ucInterruptID, pxHandler, pvCallBackRef ) )
261     {
262         XIntc_Enable( &xInterruptController, ucInterruptID );
263         xReturn = pdPASS;
264     }
265 
266     return xReturn;
267 }
268