xref: /Kernel-v10.6.2/portable/GCC/ARM_CM85/secure/secure_context_port.c (revision ef7b253b56c9788077f5ecd6c9deb4021923d646) 
1 /*
2  * FreeRTOS Kernel V10.6.2
3  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
4  *
5  * SPDX-License-Identifier: MIT
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy of
8  * this software and associated documentation files (the "Software"), to deal in
9  * the Software without restriction, including without limitation the rights to
10  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11  * the Software, and to permit persons to whom the Software is furnished to do so,
12  * subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in all
15  * copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * https://www.FreeRTOS.org
25  * https://github.com/FreeRTOS
26  *
27  */
28 
29 /* Secure context includes. */
30 #include "secure_context.h"
31 
32 /* Secure port macros. */
33 #include "secure_port_macros.h"
34 
35 void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ) __attribute__( ( naked ) );
36 void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ) __attribute__( ( naked ) );
37 
SecureContext_LoadContextAsm(SecureContext_t * pxSecureContext)38 void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext )
39 {
40     /* pxSecureContext value is in r0. */
41     __asm volatile
42     (
43         " .syntax unified                   \n"
44         "                                   \n"
45         " mrs r1, ipsr                      \n" /* r1 = IPSR. */
46         " cbz r1, load_ctx_therad_mode      \n" /* Do nothing if the processor is running in the Thread Mode. */
47         " ldmia r0!, {r1, r2}               \n" /* r1 = pxSecureContext->pucCurrentStackPointer, r2 = pxSecureContext->pucStackLimit. */
48         "                                   \n"
49         #if ( configENABLE_MPU == 1 )
50             " ldmia r1!, {r3}               \n" /* Read CONTROL register value from task's stack. r3 = CONTROL. */
51             " msr control, r3               \n" /* CONTROL = r3. */
52         #endif /* configENABLE_MPU */
53         "                                   \n"
54         " msr psplim, r2                    \n" /* PSPLIM = r2. */
55         " msr psp, r1                       \n" /* PSP = r1. */
56         "                                   \n"
57         " load_ctx_therad_mode:             \n"
58         "    bx lr                          \n"
59         "                                   \n"
60         ::: "r0", "r1", "r2"
61     );
62 }
63 /*-----------------------------------------------------------*/
64 
SecureContext_SaveContextAsm(SecureContext_t * pxSecureContext)65 void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext )
66 {
67     /* pxSecureContext value is in r0. */
68     __asm volatile
69     (
70         " .syntax unified                   \n"
71         "                                   \n"
72         " mrs r1, ipsr                      \n" /* r1 = IPSR. */
73         " cbz r1, save_ctx_therad_mode      \n" /* Do nothing if the processor is running in the Thread Mode. */
74         " mrs r1, psp                       \n" /* r1 = PSP. */
75         "                                   \n"
76         #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
77             " vstmdb r1!, {s0}              \n" /* Trigger the deferred stacking of FPU registers. */
78             " vldmia r1!, {s0}              \n" /* Nullify the effect of the previous statement. */
79         #endif /* configENABLE_FPU || configENABLE_MVE */
80         "                                   \n"
81         #if ( configENABLE_MPU == 1 )
82             " mrs r2, control               \n" /* r2 = CONTROL. */
83             " stmdb r1!, {r2}               \n" /* Store CONTROL value on the stack. */
84         #endif /* configENABLE_MPU */
85         "                                   \n"
86         " str r1, [r0]                      \n" /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */
87         " movs r1, %0                       \n" /* r1 = securecontextNO_STACK. */
88         " msr psplim, r1                    \n" /* PSPLIM = securecontextNO_STACK. */
89         " msr psp, r1                       \n" /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
90         "                                   \n"
91         " save_ctx_therad_mode:             \n"
92         "    bx lr                          \n"
93         "                                   \n"
94         ::"i" ( securecontextNO_STACK ) : "r1", "memory"
95     );
96 }
97 /*-----------------------------------------------------------*/
98