1 /*
2 * FreeRTOS Kernel V10.6.2
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
26 *
27 */
28
29
30 /*-----------------------------------------------------------
31 * Implementation of functions defined in portable.h for the ARM7 port.
32 *
33 * Components that can be compiled to either ARM or THUMB mode are
34 * contained in this file. The ISR routines, which can only be compiled
35 * to ARM mode are contained in portISR.c.
36 *----------------------------------------------------------*/
37
38
39 /* Standard includes. */
40 #include <stdlib.h>
41
42 /* Scheduler includes. */
43 #include "FreeRTOS.h"
44 #include "task.h"
45
46 /* Constants required to setup the task context. */
47 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
48 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
49 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
50 #define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
51
52 /* Constants required to setup the tick ISR. */
53 #define portENABLE_TIMER ( ( uint8_t ) 0x01 )
54 #define portPRESCALE_VALUE 0x00
55 #define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
56 #define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
57
58 /* Constants required to setup the VIC for the tick ISR. */
59 #define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )
60 #define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )
61 #define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )
62
63 /*-----------------------------------------------------------*/
64
65 /* Setup the timer to generate the tick interrupts. */
66 static void prvSetupTimerInterrupt( void );
67
68 /*
69 * The scheduler can only be started from ARM mode, so
70 * vPortISRStartFirstSTask() is defined in portISR.c.
71 */
72 extern void vPortISRStartFirstTask( void );
73
74 /*-----------------------------------------------------------*/
75
76 /*
77 * Initialise the stack of a task to look exactly as if a call to
78 * portSAVE_CONTEXT had been called.
79 *
80 * See header file for description.
81 */
pxPortInitialiseStack(StackType_t * pxTopOfStack,TaskFunction_t pxCode,void * pvParameters)82 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
83 {
84 StackType_t *pxOriginalTOS;
85
86 pxOriginalTOS = pxTopOfStack;
87
88 /* To ensure asserts in tasks.c don't fail, although in this case the assert
89 is not really required. */
90 pxTopOfStack--;
91
92 /* Setup the initial stack of the task. The stack is set exactly as
93 expected by the portRESTORE_CONTEXT() macro. */
94
95 /* First on the stack is the return address - which in this case is the
96 start of the task. The offset is added to make the return address appear
97 as it would within an IRQ ISR. */
98 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
99 pxTopOfStack--;
100
101 *pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
102 pxTopOfStack--;
103 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
104 pxTopOfStack--;
105 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
106 pxTopOfStack--;
107 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
108 pxTopOfStack--;
109 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
110 pxTopOfStack--;
111 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
112 pxTopOfStack--;
113 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
114 pxTopOfStack--;
115 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
116 pxTopOfStack--;
117 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
118 pxTopOfStack--;
119 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
120 pxTopOfStack--;
121 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
122 pxTopOfStack--;
123 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
124 pxTopOfStack--;
125 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
126 pxTopOfStack--;
127 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
128 pxTopOfStack--;
129
130 /* When the task starts is will expect to find the function parameter in
131 R0. */
132 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
133 pxTopOfStack--;
134
135 /* The last thing onto the stack is the status register, which is set for
136 system mode, with interrupts enabled. */
137 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
138
139 if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
140 {
141 /* We want the task to start in thumb mode. */
142 *pxTopOfStack |= portTHUMB_MODE_BIT;
143 }
144
145 pxTopOfStack--;
146
147 /* Some optimisation levels use the stack differently to others. This
148 means the interrupt flags cannot always be stored on the stack and will
149 instead be stored in a variable, which is then saved as part of the
150 tasks context. */
151 *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
152
153 return pxTopOfStack;
154 }
155 /*-----------------------------------------------------------*/
156
xPortStartScheduler(void)157 BaseType_t xPortStartScheduler( void )
158 {
159 /* Start the timer that generates the tick ISR. Interrupts are disabled
160 here already. */
161 prvSetupTimerInterrupt();
162
163 /* Start the first task. */
164 vPortISRStartFirstTask();
165
166 /* Should not get here! */
167 return 0;
168 }
169 /*-----------------------------------------------------------*/
170
vPortEndScheduler(void)171 void vPortEndScheduler( void )
172 {
173 /* It is unlikely that the ARM port will require this function as there
174 is nothing to return to. */
175 }
176 /*-----------------------------------------------------------*/
177
178 /*
179 * Setup the timer 0 to generate the tick interrupts at the required frequency.
180 */
prvSetupTimerInterrupt(void)181 static void prvSetupTimerInterrupt( void )
182 {
183 uint32_t ulCompareMatch;
184
185 PCLKSEL0 = (PCLKSEL0 & (~(0x3<<2))) | (0x01 << 2);
186 T0TCR = 2; /* Stop and reset the timer */
187 T0CTCR = 0; /* Timer mode */
188
189 /* A 1ms tick does not require the use of the timer prescale. This is
190 defaulted to zero but can be used if necessary. */
191 T0PR = portPRESCALE_VALUE;
192
193 /* Calculate the match value required for our wanted tick rate. */
194 ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
195
196 /* Protect against divide by zero. Using an if() statement still results
197 in a warning - hence the #if. */
198 #if portPRESCALE_VALUE != 0
199 {
200 ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
201 }
202 #endif
203 T0MR1 = ulCompareMatch;
204
205 /* Generate tick with timer 0 compare match. */
206 T0MCR = (3 << 3); /* Reset timer on match and generate interrupt */
207
208 /* Setup the VIC for the timer. */
209 VICIntEnable = 0x00000010;
210
211 /* The ISR installed depends on whether the preemptive or cooperative
212 scheduler is being used. */
213 #if configUSE_PREEMPTION == 1
214 {
215 extern void ( vPreemptiveTick )( void );
216 VICVectAddr4 = ( int32_t ) vPreemptiveTick;
217 }
218 #else
219 {
220 extern void ( vNonPreemptiveTick )( void );
221 VICVectAddr4 = ( int32_t ) vNonPreemptiveTick;
222 }
223 #endif
224
225 VICVectCntl4 = 1;
226
227 /* Start the timer - interrupts are disabled when this function is called
228 so it is okay to do this here. */
229 T0TCR = portENABLE_TIMER;
230 }
231 /*-----------------------------------------------------------*/
232