1 /*
2 * FreeRTOS Kernel V11.1.0
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
26 *
27 */
28
29
30 #include <stdlib.h>
31
32 #include <avr/io.h>
33 #include <avr/interrupt.h>
34 #include <avr/wdt.h>
35
36 #include "FreeRTOS.h"
37 #include "task.h"
38
39 /*-----------------------------------------------------------
40 * Implementation of functions defined in portable.h for the AVR port.
41 *----------------------------------------------------------*/
42
43 /* Start tasks with interrupts enabled. */
44 #define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x80 )
45
46 #if defined( portUSE_WDTO )
47 #warning "Watchdog Timer used for scheduler."
48 #define portSCHEDULER_ISR WDT_vect
49
50 #elif defined( portUSE_TIMER0 )
51 /* Hardware constants for Timer0. */
52 #warning "Timer0 used for scheduler."
53 #define portSCHEDULER_ISR TIMER0_COMPA_vect
54 #define portCLEAR_COUNTER_ON_MATCH ( ( uint8_t ) _BV( WGM01 ) )
55 #define portPRESCALE_1024 ( ( uint8_t ) ( _BV( CS02 ) | _BV( CS00 ) ) )
56 #define portCLOCK_PRESCALER ( ( uint32_t ) 1024 )
57 #define portCOMPARE_MATCH_A_INTERRUPT_ENABLE ( ( uint8_t ) _BV( OCIE0A ) )
58 #define portOCRL OCR0A
59 #define portTCCRa TCCR0A
60 #define portTCCRb TCCR0B
61 #define portTIMSK TIMSK0
62 #define portTIFR TIFR0
63
64 #else /* if defined( portUSE_WDTO ) */
65 #error "No Timer defined for scheduler"
66 #endif /* if defined( portUSE_WDTO ) */
67
68 /*-----------------------------------------------------------*/
69
70 /* We require the address of the pxCurrentTCB variable, but don't want to know
71 * any details of its type. */
72 typedef void TCB_t;
73 extern volatile TCB_t * volatile pxCurrentTCB;
74
75 /*-----------------------------------------------------------*/
76
77 /**
78 * Enable the watchdog timer, configuring it for expire after
79 * (value) timeout (which is a combination of the WDP0
80 * through WDP3 bits).
81 *
82 * This function is derived from <avr/wdt.h> but enables only
83 * the interrupt bit (WDIE), rather than the reset bit (WDE).
84 *
85 * Can't find it documented but the WDT, once enabled,
86 * rolls over and fires a new interrupt each time.
87 *
88 * See also the symbolic constants WDTO_15MS et al.
89 *
90 * Updated to match avr-libc 2.0.0
91 */
92
93 #if defined( portUSE_WDTO )
94
95 static __inline__
96 __attribute__( ( __always_inline__ ) )
wdt_interrupt_enable(const uint8_t value)97 void wdt_interrupt_enable( const uint8_t value )
98 {
99 if( _SFR_IO_REG_P( _WD_CONTROL_REG ) )
100 {
101 __asm__ __volatile__ (
102 "in __tmp_reg__,__SREG__" "\n\t"
103 "cli" "\n\t"
104 "wdr" "\n\t"
105 "out %0, %1" "\n\t"
106 "out __SREG__,__tmp_reg__" "\n\t"
107 "out %0, %2" "\n\t"
108 : /* no outputs */
109 : "I" ( _SFR_IO_ADDR( _WD_CONTROL_REG ) ),
110 "r" ( ( uint8_t ) ( _BV( _WD_CHANGE_BIT ) | _BV( WDE ) ) ),
111 "r" ( ( uint8_t ) ( ( value & 0x08 ? _WD_PS3_MASK : 0x00 ) |
112 _BV( WDIF ) | _BV( WDIE ) | ( value & 0x07 ) ) )
113 : "r0"
114 );
115 }
116 else
117 {
118 __asm__ __volatile__ (
119 "in __tmp_reg__,__SREG__" "\n\t"
120 "cli" "\n\t"
121 "wdr" "\n\t"
122 "sts %0, %1" "\n\t"
123 "out __SREG__,__tmp_reg__" "\n\t"
124 "sts %0, %2" "\n\t"
125 : /* no outputs */
126 : "n" ( _SFR_MEM_ADDR( _WD_CONTROL_REG ) ),
127 "r" ( ( uint8_t ) ( _BV( _WD_CHANGE_BIT ) | _BV( WDE ) ) ),
128 "r" ( ( uint8_t ) ( ( value & 0x08 ? _WD_PS3_MASK : 0x00 ) |
129 _BV( WDIF ) | _BV( WDIE ) | ( value & 0x07 ) ) )
130 : "r0"
131 );
132 }
133 }
134 #endif /* if defined( portUSE_WDTO ) */
135
136 /*-----------------------------------------------------------*/
137
138 /**
139 * Enable the watchdog timer, configuring it for expire after
140 * (value) timeout (which is a combination of the WDP0
141 * through WDP3 bits).
142 *
143 * This function is derived from <avr/wdt.h> but enables both
144 * the reset bit (WDE), and the interrupt bit (WDIE).
145 *
146 * This will ensure that if the interrupt is not serviced
147 * before the second timeout, the AVR will reset.
148 *
149 * Servicing the interrupt automatically clears it,
150 * and ensures the AVR does not reset.
151 *
152 * Can't find it documented but the WDT, once enabled,
153 * rolls over and fires a new interrupt each time.
154 *
155 * See also the symbolic constants WDTO_15MS et al.
156 *
157 * Updated to match avr-libc 2.0.0
158 */
159
160 #if defined( portUSE_WDTO )
161
162 static __inline__
163 __attribute__( ( __always_inline__ ) )
wdt_interrupt_reset_enable(const uint8_t value)164 void wdt_interrupt_reset_enable( const uint8_t value )
165 {
166 if( _SFR_IO_REG_P( _WD_CONTROL_REG ) )
167 {
168 __asm__ __volatile__ (
169 "in __tmp_reg__,__SREG__" "\n\t"
170 "cli" "\n\t"
171 "wdr" "\n\t"
172 "out %0, %1" "\n\t"
173 "out __SREG__,__tmp_reg__" "\n\t"
174 "out %0, %2" "\n\t"
175 : /* no outputs */
176 : "I" ( _SFR_IO_ADDR( _WD_CONTROL_REG ) ),
177 "r" ( ( uint8_t ) ( _BV( _WD_CHANGE_BIT ) | _BV( WDE ) ) ),
178 "r" ( ( uint8_t ) ( ( value & 0x08 ? _WD_PS3_MASK : 0x00 ) |
179 _BV( WDIF ) | _BV( WDIE ) | _BV( WDE ) | ( value & 0x07 ) ) )
180 : "r0"
181 );
182 }
183 else
184 {
185 __asm__ __volatile__ (
186 "in __tmp_reg__,__SREG__" "\n\t"
187 "cli" "\n\t"
188 "wdr" "\n\t"
189 "sts %0, %1" "\n\t"
190 "out __SREG__,__tmp_reg__" "\n\t"
191 "sts %0, %2" "\n\t"
192 : /* no outputs */
193 : "n" ( _SFR_MEM_ADDR( _WD_CONTROL_REG ) ),
194 "r" ( ( uint8_t ) ( _BV( _WD_CHANGE_BIT ) | _BV( WDE ) ) ),
195 "r" ( ( uint8_t ) ( ( value & 0x08 ? _WD_PS3_MASK : 0x00 ) |
196 _BV( WDIF ) | _BV( WDIE ) | _BV( WDE ) | ( value & 0x07 ) ) )
197 : "r0"
198 );
199 }
200 }
201 #endif /* if defined( portUSE_WDTO ) */
202
203 /*-----------------------------------------------------------*/
204
205 /*
206 * Macro to save all the general purpose registers, the save the stack pointer
207 * into the TCB.
208 *
209 * The first thing we do is save the flags then disable interrupts. This is to
210 * guard our stack against having a context switch interrupt after we have already
211 * pushed the registers onto the stack - causing the 32 registers to be on the
212 * stack twice.
213 *
214 * r1 is set to zero (__zero_reg__) as the compiler expects it to be thus, however
215 * some of the math routines make use of R1.
216 *
217 * r0 is set to __tmp_reg__ as the compiler expects it to be thus.
218 *
219 * #if defined(__AVR_HAVE_RAMPZ__)
220 * #define __RAMPZ__ 0x3B
221 * #endif
222 *
223 * #if defined(__AVR_3_BYTE_PC__)
224 * #define __EIND__ 0x3C
225 * #endif
226 *
227 * The interrupts will have been disabled during the call to portSAVE_CONTEXT()
228 * so we need not worry about reading/writing to the stack pointer.
229 */
230 #if defined( __AVR_3_BYTE_PC__ ) && defined( __AVR_HAVE_RAMPZ__ )
231 /* 3-Byte PC Save with RAMPZ */
232 #define portSAVE_CONTEXT() \
233 __asm__ __volatile__ ( "push __tmp_reg__ \n\t" \
234 "in __tmp_reg__, __SREG__ \n\t" \
235 "cli \n\t" \
236 "push __tmp_reg__ \n\t" \
237 "in __tmp_reg__, 0x3B \n\t" \
238 "push __tmp_reg__ \n\t" \
239 "in __tmp_reg__, 0x3C \n\t" \
240 "push __tmp_reg__ \n\t" \
241 "push __zero_reg__ \n\t" \
242 "clr __zero_reg__ \n\t" \
243 "push r2 \n\t" \
244 "push r3 \n\t" \
245 "push r4 \n\t" \
246 "push r5 \n\t" \
247 "push r6 \n\t" \
248 "push r7 \n\t" \
249 "push r8 \n\t" \
250 "push r9 \n\t" \
251 "push r10 \n\t" \
252 "push r11 \n\t" \
253 "push r12 \n\t" \
254 "push r13 \n\t" \
255 "push r14 \n\t" \
256 "push r15 \n\t" \
257 "push r16 \n\t" \
258 "push r17 \n\t" \
259 "push r18 \n\t" \
260 "push r19 \n\t" \
261 "push r20 \n\t" \
262 "push r21 \n\t" \
263 "push r22 \n\t" \
264 "push r23 \n\t" \
265 "push r24 \n\t" \
266 "push r25 \n\t" \
267 "push r26 \n\t" \
268 "push r27 \n\t" \
269 "push r28 \n\t" \
270 "push r29 \n\t" \
271 "push r30 \n\t" \
272 "push r31 \n\t" \
273 "lds r26, pxCurrentTCB \n\t" \
274 "lds r27, pxCurrentTCB + 1 \n\t" \
275 "in __tmp_reg__, __SP_L__ \n\t" \
276 "st x+, __tmp_reg__ \n\t" \
277 "in __tmp_reg__, __SP_H__ \n\t" \
278 "st x+, __tmp_reg__ \n\t" \
279 );
280 #elif defined( __AVR_HAVE_RAMPZ__ )
281 /* 2-Byte PC Save with RAMPZ */
282 #define portSAVE_CONTEXT() \
283 __asm__ __volatile__ ( "push __tmp_reg__ \n\t" \
284 "in __tmp_reg__, __SREG__ \n\t" \
285 "cli \n\t" \
286 "push __tmp_reg__ \n\t" \
287 "in __tmp_reg__, 0x3B \n\t" \
288 "push __tmp_reg__ \n\t" \
289 "push __zero_reg__ \n\t" \
290 "clr __zero_reg__ \n\t" \
291 "push r2 \n\t" \
292 "push r3 \n\t" \
293 "push r4 \n\t" \
294 "push r5 \n\t" \
295 "push r6 \n\t" \
296 "push r7 \n\t" \
297 "push r8 \n\t" \
298 "push r9 \n\t" \
299 "push r10 \n\t" \
300 "push r11 \n\t" \
301 "push r12 \n\t" \
302 "push r13 \n\t" \
303 "push r14 \n\t" \
304 "push r15 \n\t" \
305 "push r16 \n\t" \
306 "push r17 \n\t" \
307 "push r18 \n\t" \
308 "push r19 \n\t" \
309 "push r20 \n\t" \
310 "push r21 \n\t" \
311 "push r22 \n\t" \
312 "push r23 \n\t" \
313 "push r24 \n\t" \
314 "push r25 \n\t" \
315 "push r26 \n\t" \
316 "push r27 \n\t" \
317 "push r28 \n\t" \
318 "push r29 \n\t" \
319 "push r30 \n\t" \
320 "push r31 \n\t" \
321 "lds r26, pxCurrentTCB \n\t" \
322 "lds r27, pxCurrentTCB + 1 \n\t" \
323 "in __tmp_reg__, __SP_L__ \n\t" \
324 "st x+, __tmp_reg__ \n\t" \
325 "in __tmp_reg__, __SP_H__ \n\t" \
326 "st x+, __tmp_reg__ \n\t" \
327 );
328 #else /* if defined( __AVR_3_BYTE_PC__ ) && defined( __AVR_HAVE_RAMPZ__ ) */
329 /* 2-Byte PC Save */
330 #define portSAVE_CONTEXT() \
331 __asm__ __volatile__ ( "push __tmp_reg__ \n\t" \
332 "in __tmp_reg__, __SREG__ \n\t" \
333 "cli \n\t" \
334 "push __tmp_reg__ \n\t" \
335 "push __zero_reg__ \n\t" \
336 "clr __zero_reg__ \n\t" \
337 "push r2 \n\t" \
338 "push r3 \n\t" \
339 "push r4 \n\t" \
340 "push r5 \n\t" \
341 "push r6 \n\t" \
342 "push r7 \n\t" \
343 "push r8 \n\t" \
344 "push r9 \n\t" \
345 "push r10 \n\t" \
346 "push r11 \n\t" \
347 "push r12 \n\t" \
348 "push r13 \n\t" \
349 "push r14 \n\t" \
350 "push r15 \n\t" \
351 "push r16 \n\t" \
352 "push r17 \n\t" \
353 "push r18 \n\t" \
354 "push r19 \n\t" \
355 "push r20 \n\t" \
356 "push r21 \n\t" \
357 "push r22 \n\t" \
358 "push r23 \n\t" \
359 "push r24 \n\t" \
360 "push r25 \n\t" \
361 "push r26 \n\t" \
362 "push r27 \n\t" \
363 "push r28 \n\t" \
364 "push r29 \n\t" \
365 "push r30 \n\t" \
366 "push r31 \n\t" \
367 "lds r26, pxCurrentTCB \n\t" \
368 "lds r27, pxCurrentTCB + 1 \n\t" \
369 "in __tmp_reg__, __SP_L__ \n\t" \
370 "st x+, __tmp_reg__ \n\t" \
371 "in __tmp_reg__, __SP_H__ \n\t" \
372 "st x+, __tmp_reg__ \n\t" \
373 );
374 #endif /* if defined( __AVR_3_BYTE_PC__ ) && defined( __AVR_HAVE_RAMPZ__ ) */
375
376 /*
377 * Opposite to portSAVE_CONTEXT(). Interrupts will have been disabled during
378 * the context save so we can write to the stack pointer.
379 */
380 #if defined( __AVR_3_BYTE_PC__ ) && defined( __AVR_HAVE_RAMPZ__ )
381 /* 3-Byte PC Restore with RAMPZ */
382 #define portRESTORE_CONTEXT() \
383 __asm__ __volatile__ ( "lds r26, pxCurrentTCB \n\t" \
384 "lds r27, pxCurrentTCB + 1 \n\t" \
385 "ld r28, x+ \n\t" \
386 "out __SP_L__, r28 \n\t" \
387 "ld r29, x+ \n\t" \
388 "out __SP_H__, r29 \n\t" \
389 "pop r31 \n\t" \
390 "pop r30 \n\t" \
391 "pop r29 \n\t" \
392 "pop r28 \n\t" \
393 "pop r27 \n\t" \
394 "pop r26 \n\t" \
395 "pop r25 \n\t" \
396 "pop r24 \n\t" \
397 "pop r23 \n\t" \
398 "pop r22 \n\t" \
399 "pop r21 \n\t" \
400 "pop r20 \n\t" \
401 "pop r19 \n\t" \
402 "pop r18 \n\t" \
403 "pop r17 \n\t" \
404 "pop r16 \n\t" \
405 "pop r15 \n\t" \
406 "pop r14 \n\t" \
407 "pop r13 \n\t" \
408 "pop r12 \n\t" \
409 "pop r11 \n\t" \
410 "pop r10 \n\t" \
411 "pop r9 \n\t" \
412 "pop r8 \n\t" \
413 "pop r7 \n\t" \
414 "pop r6 \n\t" \
415 "pop r5 \n\t" \
416 "pop r4 \n\t" \
417 "pop r3 \n\t" \
418 "pop r2 \n\t" \
419 "pop __zero_reg__ \n\t" \
420 "pop __tmp_reg__ \n\t" \
421 "out 0x3C, __tmp_reg__ \n\t" \
422 "pop __tmp_reg__ \n\t" \
423 "out 0x3B, __tmp_reg__ \n\t" \
424 "pop __tmp_reg__ \n\t" \
425 "out __SREG__, __tmp_reg__ \n\t" \
426 "pop __tmp_reg__ \n\t" \
427 );
428 #elif defined( __AVR_HAVE_RAMPZ__ )
429 /* 2-Byte PC Restore with RAMPZ */
430 #define portRESTORE_CONTEXT() \
431 __asm__ __volatile__ ( "lds r26, pxCurrentTCB \n\t" \
432 "lds r27, pxCurrentTCB + 1 \n\t" \
433 "ld r28, x+ \n\t" \
434 "out __SP_L__, r28 \n\t" \
435 "ld r29, x+ \n\t" \
436 "out __SP_H__, r29 \n\t" \
437 "pop r31 \n\t" \
438 "pop r30 \n\t" \
439 "pop r29 \n\t" \
440 "pop r28 \n\t" \
441 "pop r27 \n\t" \
442 "pop r26 \n\t" \
443 "pop r25 \n\t" \
444 "pop r24 \n\t" \
445 "pop r23 \n\t" \
446 "pop r22 \n\t" \
447 "pop r21 \n\t" \
448 "pop r20 \n\t" \
449 "pop r19 \n\t" \
450 "pop r18 \n\t" \
451 "pop r17 \n\t" \
452 "pop r16 \n\t" \
453 "pop r15 \n\t" \
454 "pop r14 \n\t" \
455 "pop r13 \n\t" \
456 "pop r12 \n\t" \
457 "pop r11 \n\t" \
458 "pop r10 \n\t" \
459 "pop r9 \n\t" \
460 "pop r8 \n\t" \
461 "pop r7 \n\t" \
462 "pop r6 \n\t" \
463 "pop r5 \n\t" \
464 "pop r4 \n\t" \
465 "pop r3 \n\t" \
466 "pop r2 \n\t" \
467 "pop __zero_reg__ \n\t" \
468 "pop __tmp_reg__ \n\t" \
469 "out 0x3B, __tmp_reg__ \n\t" \
470 "pop __tmp_reg__ \n\t" \
471 "out __SREG__, __tmp_reg__ \n\t" \
472 "pop __tmp_reg__ \n\t" \
473 );
474 #else /* if defined( __AVR_3_BYTE_PC__ ) && defined( __AVR_HAVE_RAMPZ__ ) */
475 /* 2-Byte PC Restore */
476 #define portRESTORE_CONTEXT() \
477 __asm__ __volatile__ ( "lds r26, pxCurrentTCB \n\t" \
478 "lds r27, pxCurrentTCB + 1 \n\t" \
479 "ld r28, x+ \n\t" \
480 "out __SP_L__, r28 \n\t" \
481 "ld r29, x+ \n\t" \
482 "out __SP_H__, r29 \n\t" \
483 "pop r31 \n\t" \
484 "pop r30 \n\t" \
485 "pop r29 \n\t" \
486 "pop r28 \n\t" \
487 "pop r27 \n\t" \
488 "pop r26 \n\t" \
489 "pop r25 \n\t" \
490 "pop r24 \n\t" \
491 "pop r23 \n\t" \
492 "pop r22 \n\t" \
493 "pop r21 \n\t" \
494 "pop r20 \n\t" \
495 "pop r19 \n\t" \
496 "pop r18 \n\t" \
497 "pop r17 \n\t" \
498 "pop r16 \n\t" \
499 "pop r15 \n\t" \
500 "pop r14 \n\t" \
501 "pop r13 \n\t" \
502 "pop r12 \n\t" \
503 "pop r11 \n\t" \
504 "pop r10 \n\t" \
505 "pop r9 \n\t" \
506 "pop r8 \n\t" \
507 "pop r7 \n\t" \
508 "pop r6 \n\t" \
509 "pop r5 \n\t" \
510 "pop r4 \n\t" \
511 "pop r3 \n\t" \
512 "pop r2 \n\t" \
513 "pop __zero_reg__ \n\t" \
514 "pop __tmp_reg__ \n\t" \
515 "out __SREG__, __tmp_reg__ \n\t" \
516 "pop __tmp_reg__ \n\t" \
517 );
518 #endif /* if defined( __AVR_3_BYTE_PC__ ) && defined( __AVR_HAVE_RAMPZ__ ) */
519 /*-----------------------------------------------------------*/
520
521 /*
522 * Perform hardware setup to enable ticks from relevant Timer.
523 */
524 static void prvSetupTimerInterrupt( void );
525 /*-----------------------------------------------------------*/
526
527 /*
528 * See header file for description.
529 */
pxPortInitialiseStack(StackType_t * pxTopOfStack,TaskFunction_t pxCode,void * pvParameters)530 StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
531 TaskFunction_t pxCode,
532 void * pvParameters )
533 {
534 uint16_t usAddress;
535
536 /* Simulate how the stack would look after a call to vPortYield() generated by
537 * the compiler. */
538
539 /* The start of the task code will be popped off the stack last, so place
540 * it on first. */
541 usAddress = ( uint16_t ) pxCode;
542 *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
543 pxTopOfStack--;
544
545 usAddress >>= 8;
546 *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
547 pxTopOfStack--;
548
549 #if defined( __AVR_3_BYTE_PC__ )
550
551 /* The AVR ATmega2560/ATmega2561 have 256KBytes of program memory and a 17-bit
552 * program counter. When a code address is stored on the stack, it takes 3 bytes
553 * instead of 2 for the other ATmega* chips.
554 *
555 * Store 0 as the top byte since we force all task routines to the bottom 128K
556 * of flash. We do this by using the .lowtext label in the linker script.
557 *
558 * In order to do this properly, we would need to get a full 3-byte pointer to
559 * pxCode. That requires a change to GCC. Not likely to happen any time soon.
560 */
561 *pxTopOfStack = 0;
562 pxTopOfStack--;
563 #endif
564
565 /* Next simulate the stack as if after a call to portSAVE_CONTEXT().
566 * portSAVE_CONTEXT places the flags on the stack immediately after r0
567 * to ensure the interrupts get disabled as soon as possible, and so ensuring
568 * the stack use is minimal should a context switch interrupt occur. */
569 *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
570 pxTopOfStack--;
571 *pxTopOfStack = portFLAGS_INT_ENABLED;
572 pxTopOfStack--;
573
574 #if defined( __AVR_3_BYTE_PC__ )
575
576 /* If we have an ATmega256x, we are also saving the EIND register.
577 * We should default to 0.
578 */
579 *pxTopOfStack = ( StackType_t ) 0x00; /* EIND */
580 pxTopOfStack--;
581 #endif
582
583 #if defined( __AVR_HAVE_RAMPZ__ )
584
585 /* We are saving the RAMPZ register.
586 * We should default to 0.
587 */
588 *pxTopOfStack = ( StackType_t ) 0x00; /* RAMPZ */
589 pxTopOfStack--;
590 #endif
591
592 /* Now the remaining registers. The compiler expects R1 to be 0. */
593 *pxTopOfStack = ( StackType_t ) 0x00; /* R1 */
594
595 /* Leave R2 - R23 untouched */
596 pxTopOfStack -= 23;
597
598 /* Place the parameter on the stack in the expected location. */
599 usAddress = ( uint16_t ) pvParameters;
600 *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
601 pxTopOfStack--;
602
603 usAddress >>= 8;
604 *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
605
606 /* Leave register R26 - R31 untouched */
607 pxTopOfStack -= 7;
608
609 return pxTopOfStack;
610 }
611 /*-----------------------------------------------------------*/
612
xPortStartScheduler(void)613 BaseType_t xPortStartScheduler( void )
614 {
615 /* Setup the relevant timer hardware to generate the tick. */
616 prvSetupTimerInterrupt();
617
618 /* Restore the context of the first task that is going to run. */
619 portRESTORE_CONTEXT();
620
621 /* Simulate a function call end as generated by the compiler. We will now
622 * jump to the start of the task the context of which we have just restored. */
623 __asm__ __volatile__ ( "ret" );
624
625 /* Should not get here. */
626 return pdTRUE;
627 }
628 /*-----------------------------------------------------------*/
629
vPortEndScheduler(void)630 void vPortEndScheduler( void )
631 {
632 /* It is unlikely that the ATmega port will get stopped. */
633 }
634 /*-----------------------------------------------------------*/
635
636 /*
637 * Manual context switch. The first thing we do is save the registers so we
638 * can use a naked attribute.
639 */
640 void vPortYield( void ) __attribute__( ( hot, flatten, naked ) );
vPortYield(void)641 void vPortYield( void )
642 {
643 portSAVE_CONTEXT();
644 vTaskSwitchContext();
645 portRESTORE_CONTEXT();
646
647 __asm__ __volatile__ ( "ret" );
648 }
649 /*-----------------------------------------------------------*/
650
651 /*
652 * Manual context switch callable from ISRs. The first thing we do is save
653 * the registers so we can use a naked attribute.
654 */
655 void vPortYieldFromISR( void ) __attribute__( ( hot, flatten, naked ) );
vPortYieldFromISR(void)656 void vPortYieldFromISR( void )
657 {
658 portSAVE_CONTEXT();
659 vTaskSwitchContext();
660 portRESTORE_CONTEXT();
661
662 __asm__ __volatile__ ( "reti" );
663 }
664 /*-----------------------------------------------------------*/
665
666 /*
667 * Context switch function used by the tick. This must be identical to
668 * vPortYield() from the call to vTaskSwitchContext() onwards. The only
669 * difference from vPortYield() is the tick count is incremented as the
670 * call comes from the tick ISR.
671 */
672 void vPortYieldFromTick( void ) __attribute__( ( hot, flatten, naked ) );
vPortYieldFromTick(void)673 void vPortYieldFromTick( void )
674 {
675 portSAVE_CONTEXT();
676
677 if( xTaskIncrementTick() != pdFALSE )
678 {
679 vTaskSwitchContext();
680 }
681
682 portRESTORE_CONTEXT();
683
684 __asm__ __volatile__ ( "ret" );
685 }
686 /*-----------------------------------------------------------*/
687
688 #if defined( portUSE_WDTO )
689
690 /*
691 * Setup WDT to generate a tick interrupt.
692 */
prvSetupTimerInterrupt(void)693 void prvSetupTimerInterrupt( void )
694 {
695 /* reset watchdog */
696 wdt_reset();
697
698 /* set up WDT Interrupt (rather than the WDT Reset). */
699 wdt_interrupt_enable( portUSE_WDTO );
700 }
701
702 #elif defined( portUSE_TIMER0 )
703
704 /*
705 * Setup Timer0 compare match A to generate a tick interrupt.
706 */
prvSetupTimerInterrupt(void)707 static void prvSetupTimerInterrupt( void )
708 {
709 uint32_t ulCompareMatch;
710 uint8_t ucLowByte;
711
712 /* Using 8bit Timer0 to generate the tick. Correct fuses must be
713 * selected for the configCPU_CLOCK_HZ clock.*/
714
715 ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
716
717 /* We only have 8 bits so have to scale 1024 to get our required tick rate. */
718 ulCompareMatch /= portCLOCK_PRESCALER;
719
720 /* Adjust for correct value. */
721 ulCompareMatch -= ( uint32_t ) 1;
722
723 /* Setup compare match value for compare match A. Interrupts are disabled
724 * before this is called so we need not worry here. */
725 ucLowByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff );
726 portOCRL = ucLowByte;
727
728 /* Setup clock source and compare match behaviour. */
729 portTCCRa = portCLEAR_COUNTER_ON_MATCH;
730 portTCCRb = portPRESCALE_1024;
731
732
733 /* Enable the interrupt - this is okay as interrupt are currently globally disabled. */
734 ucLowByte = portTIMSK;
735 ucLowByte |= portCOMPARE_MATCH_A_INTERRUPT_ENABLE;
736 portTIMSK = ucLowByte;
737 }
738
739 #endif /* if defined( portUSE_WDTO ) */
740
741 /*-----------------------------------------------------------*/
742
743 #if configUSE_PREEMPTION == 1
744
745 /*
746 * Tick ISR for preemptive scheduler. We can use a naked attribute as
747 * the context is saved at the start of vPortYieldFromTick(). The tick
748 * count is incremented after the context is saved.
749 *
750 * use ISR_NOBLOCK where there is an important timer running, that should preempt the scheduler.
751 *
752 */
753 ISR( portSCHEDULER_ISR, ISR_NAKED ) __attribute__( ( hot, flatten ) );
754
755 /* ISR(portSCHEDULER_ISR, ISR_NAKED ISR_NOBLOCK) __attribute__ ((hot, flatten));
756 */
ISR(portSCHEDULER_ISR)757 ISR( portSCHEDULER_ISR )
758 {
759 vPortYieldFromTick();
760 __asm__ __volatile__ ( "reti" );
761 }
762 #else /* if configUSE_PREEMPTION == 1 */
763
764 /*
765 * Tick ISR for the cooperative scheduler. All this does is increment the
766 * tick count. We don't need to switch context, this can only be done by
767 * manual calls to taskYIELD();
768 *
769 * use ISR_NOBLOCK where there is an important timer running, that should preempt the scheduler.
770 */
771 ISR( portSCHEDULER_ISR ) __attribute__( ( hot, flatten ) );
772
773 /* ISR(portSCHEDULER_ISR, ISR_NOBLOCK) __attribute__ ((hot, flatten));
774 */
ISR(portSCHEDULER_ISR)775 ISR( portSCHEDULER_ISR )
776 {
777 xTaskIncrementTick();
778 }
779 #endif /* if configUSE_PREEMPTION == 1 */
780
