1 /*
2 * FreeRTOS Kernel V11.1.0
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
26 *
27 */
28
29 /*-----------------------------------------------------------
30 * Implementation of functions defined in portable.h for the Philips ARM7 port.
31 *----------------------------------------------------------*/
32
33 /*
34 * Changes from V3.2.2
35 *
36 + Bug fix - The prescale value for the timer setup is now written to T0PR
37 + instead of T0PC. This bug would have had no effect unless a prescale
38 + value was actually used.
39 */
40
41 /* Standard includes. */
42 #include <stdlib.h>
43 #include <intrinsics.h>
44
45 /* Scheduler includes. */
46 #include "FreeRTOS.h"
47 #include "task.h"
48
49 /* Constants required to setup the tick ISR. */
50 #define portENABLE_TIMER ( ( uint8_t ) 0x01 )
51 #define portPRESCALE_VALUE 0x00
52 #define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
53 #define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
54
55 /* Constants required to setup the initial stack. */
56 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
57 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
58 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
59
60 /* Constants required to setup the PIT. */
61 #define portPIT_CLOCK_DIVISOR ( ( uint32_t ) 16 )
62 #define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_PERIOD_MS )
63
64 /* Constants required to handle interrupts. */
65 #define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )
66 #define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )
67
68 /* Constants required to handle critical sections. */
69 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
70
71
72 #define portINT_LEVEL_SENSITIVE 0
73 #define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
74 #define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
75
76 /* Constants required to setup the VIC for the tick ISR. */
77 #define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )
78 #define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )
79 #define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )
80
81 /*-----------------------------------------------------------*/
82
83 /* Setup the PIT to generate the tick interrupts. */
84 static void prvSetupTimerInterrupt( void );
85
86 /* ulCriticalNesting will get set to zero when the first task starts. It
87 * cannot be initialised to 0 as this will cause interrupts to be enabled
88 * during the kernel initialisation process. */
89 uint32_t ulCriticalNesting = ( uint32_t ) 9999;
90
91 /*-----------------------------------------------------------*/
92
93 /*
94 * Initialise the stack of a task to look exactly as if a call to
95 * portSAVE_CONTEXT had been called.
96 *
97 * See header file for description.
98 */
pxPortInitialiseStack(StackType_t * pxTopOfStack,TaskFunction_t pxCode,void * pvParameters)99 StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
100 TaskFunction_t pxCode,
101 void * pvParameters )
102 {
103 StackType_t * pxOriginalTOS;
104
105 pxOriginalTOS = pxTopOfStack;
106
107 /* Setup the initial stack of the task. The stack is set exactly as
108 * expected by the portRESTORE_CONTEXT() macro. */
109
110 /* First on the stack is the return address - which in this case is the
111 * start of the task. The offset is added to make the return address appear
112 * as it would within an IRQ ISR. */
113 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
114 pxTopOfStack--;
115
116 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
117 pxTopOfStack--;
118 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
119 pxTopOfStack--;
120 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
121 pxTopOfStack--;
122 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
123 pxTopOfStack--;
124 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
125 pxTopOfStack--;
126 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
127 pxTopOfStack--;
128 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
129 pxTopOfStack--;
130 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
131 pxTopOfStack--;
132 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
133 pxTopOfStack--;
134 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
135 pxTopOfStack--;
136 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
137 pxTopOfStack--;
138 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
139 pxTopOfStack--;
140 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
141 pxTopOfStack--;
142 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
143 pxTopOfStack--;
144
145 /* When the task starts is will expect to find the function parameter in
146 * R0. */
147 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
148 pxTopOfStack--;
149
150 /* The status register is set for system mode, with interrupts enabled. */
151 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
152
153 if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )
154 {
155 /* We want the task to start in thumb mode. */
156 *pxTopOfStack |= portTHUMB_MODE_BIT;
157 }
158
159 pxTopOfStack--;
160
161 /* Interrupt flags cannot always be stored on the stack and will
162 * instead be stored in a variable, which is then saved as part of the
163 * tasks context. */
164 *pxTopOfStack = portNO_CRITICAL_NESTING;
165
166 return pxTopOfStack;
167 }
168 /*-----------------------------------------------------------*/
169
xPortStartScheduler(void)170 BaseType_t xPortStartScheduler( void )
171 {
172 extern void vPortStartFirstTask( void );
173
174 /* Start the timer that generates the tick ISR. Interrupts are disabled
175 * here already. */
176 prvSetupTimerInterrupt();
177
178 /* Start the first task. */
179 vPortStartFirstTask();
180
181 /* Should not get here! */
182 return 0;
183 }
184 /*-----------------------------------------------------------*/
185
vPortEndScheduler(void)186 void vPortEndScheduler( void )
187 {
188 /* It is unlikely that the ARM port will require this function as there
189 * is nothing to return to. */
190 }
191 /*-----------------------------------------------------------*/
192
193 #if configUSE_PREEMPTION == 0
194
195 /* The cooperative scheduler requires a normal IRQ service routine to
196 * simply increment the system tick. */
197 static __arm __irq void vPortNonPreemptiveTick( void );
vPortNonPreemptiveTick(void)198 static __arm __irq void vPortNonPreemptiveTick( void )
199 {
200 /* Increment the tick count - which may wake some tasks but as the
201 * preemptive scheduler is not being used any woken task is not given
202 * processor time no matter what its priority. */
203 xTaskIncrementTick();
204
205 /* Ready for the next interrupt. */
206 T0IR = portTIMER_MATCH_ISR_BIT;
207 VICVectAddr = portCLEAR_VIC_INTERRUPT;
208 }
209
210 #else /* if configUSE_PREEMPTION == 0 */
211
212 /* This function is called from an asm wrapper, so does not require the __irq
213 * keyword. */
214 void vPortPreemptiveTick( void );
vPortPreemptiveTick(void)215 void vPortPreemptiveTick( void )
216 {
217 /* Increment the tick counter. */
218 if( xTaskIncrementTick() != pdFALSE )
219 {
220 /* The new tick value might unblock a task. Ensure the highest task that
221 * is ready to execute is the task that will execute when the tick ISR
222 * exits. */
223 vTaskSwitchContext();
224 }
225
226 /* Ready for the next interrupt. */
227 T0IR = portTIMER_MATCH_ISR_BIT;
228 VICVectAddr = portCLEAR_VIC_INTERRUPT;
229 }
230
231 #endif /* if configUSE_PREEMPTION == 0 */
232
233 /*-----------------------------------------------------------*/
234
prvSetupTimerInterrupt(void)235 static void prvSetupTimerInterrupt( void )
236 {
237 uint32_t ulCompareMatch;
238
239 /* A 1ms tick does not require the use of the timer prescale. This is
240 * defaulted to zero but can be used if necessary. */
241 T0PR = portPRESCALE_VALUE;
242
243 /* Calculate the match value required for our wanted tick rate. */
244 ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
245
246 /* Protect against divide by zero. Using an if() statement still results
247 * in a warning - hence the #if. */
248 #if portPRESCALE_VALUE != 0
249 {
250 ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
251 }
252 #endif
253
254 T0MR0 = ulCompareMatch;
255
256 /* Generate tick with timer 0 compare match. */
257 T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
258
259 /* Setup the VIC for the timer. */
260 VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
261 VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
262
263 /* The ISR installed depends on whether the preemptive or cooperative
264 * scheduler is being used. */
265 #if configUSE_PREEMPTION == 1
266 {
267 extern void( vPortPreemptiveTickEntry )( void );
268
269 VICVectAddr0 = ( uint32_t ) vPortPreemptiveTickEntry;
270 }
271 #else
272 {
273 extern void( vNonPreemptiveTick )( void );
274
275 VICVectAddr0 = ( int32_t ) vPortNonPreemptiveTick;
276 }
277 #endif /* if configUSE_PREEMPTION == 1 */
278
279 VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
280
281 /* Start the timer - interrupts are disabled when this function is called
282 * so it is okay to do this here. */
283 T0TCR = portENABLE_TIMER;
284 }
285 /*-----------------------------------------------------------*/
286
vPortEnterCritical(void)287 void vPortEnterCritical( void )
288 {
289 /* Disable interrupts first! */
290 __disable_interrupt();
291
292 /* Now that interrupts are disabled, ulCriticalNesting can be accessed
293 * directly. Increment ulCriticalNesting to keep a count of how many times
294 * portENTER_CRITICAL() has been called. */
295 ulCriticalNesting++;
296 }
297 /*-----------------------------------------------------------*/
298
vPortExitCritical(void)299 void vPortExitCritical( void )
300 {
301 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
302 {
303 /* Decrement the nesting count as we are leaving a critical section. */
304 ulCriticalNesting--;
305
306 /* If the nesting level has reached zero then interrupts should be
307 * re-enabled. */
308 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
309 {
310 __enable_interrupt();
311 }
312 }
313 }
314 /*-----------------------------------------------------------*/
315
