1 /*
2 * FreeRTOS Kernel V11.1.0
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
26 *
27 */
28
29 /*-----------------------------------------------------------
30 * Implementation of functions defined in portable.h for the Atmel ARM7 port.
31 *----------------------------------------------------------*/
32
33
34 /* Standard includes. */
35 #include <stdlib.h>
36
37 /* Scheduler includes. */
38 #include "FreeRTOS.h"
39 #include "task.h"
40
41 /* Hardware includes. */
42 #include <board.h>
43 #include <pio/pio.h>
44 #include <pio/pio_it.h>
45 #include <pit/pit.h>
46 #include <aic/aic.h>
47 #include <tc/tc.h>
48 #include <utility/led.h>
49 #include <utility/trace.h>
50
51 /*-----------------------------------------------------------*/
52
53 /* Constants required to setup the initial stack. */
54 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
55 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
56 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
57
58 /* Constants required to setup the PIT. */
59 #define port1MHz_IN_Hz ( 1000000ul )
60 #define port1SECOND_IN_uS ( 1000000.0 )
61
62 /* Constants required to handle critical sections. */
63 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
64
65
66 #define portINT_LEVEL_SENSITIVE 0
67 #define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
68 #define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
69 /*-----------------------------------------------------------*/
70
71 /* Setup the PIT to generate the tick interrupts. */
72 static void prvSetupTimerInterrupt( void );
73
74 /* The PIT interrupt handler - the RTOS tick. */
75 static void vPortTickISR( void );
76
77 /* ulCriticalNesting will get set to zero when the first task starts. It
78 * cannot be initialised to 0 as this will cause interrupts to be enabled
79 * during the kernel initialisation process. */
80 uint32_t ulCriticalNesting = ( uint32_t ) 9999;
81
82 /*-----------------------------------------------------------*/
83
84 /*
85 * Initialise the stack of a task to look exactly as if a call to
86 * portSAVE_CONTEXT had been called.
87 *
88 * See header file for description.
89 */
pxPortInitialiseStack(StackType_t * pxTopOfStack,TaskFunction_t pxCode,void * pvParameters)90 StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
91 TaskFunction_t pxCode,
92 void * pvParameters )
93 {
94 StackType_t * pxOriginalTOS;
95
96 pxOriginalTOS = pxTopOfStack;
97
98 /* To ensure asserts in tasks.c don't fail, although in this case the assert
99 * is not really required. */
100 pxTopOfStack--;
101
102 /* Setup the initial stack of the task. The stack is set exactly as
103 * expected by the portRESTORE_CONTEXT() macro. */
104
105 /* First on the stack is the return address - which in this case is the
106 * start of the task. The offset is added to make the return address appear
107 * as it would within an IRQ ISR. */
108 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
109 pxTopOfStack--;
110
111 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
112 pxTopOfStack--;
113 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
114 pxTopOfStack--;
115 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
116 pxTopOfStack--;
117 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
118 pxTopOfStack--;
119 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
120 pxTopOfStack--;
121 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
122 pxTopOfStack--;
123 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
124 pxTopOfStack--;
125 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
126 pxTopOfStack--;
127 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
128 pxTopOfStack--;
129 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
130 pxTopOfStack--;
131 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
132 pxTopOfStack--;
133 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
134 pxTopOfStack--;
135 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
136 pxTopOfStack--;
137 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
138 pxTopOfStack--;
139
140 /* When the task starts is will expect to find the function parameter in
141 * R0. */
142 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
143 pxTopOfStack--;
144
145 /* The status register is set for system mode, with interrupts enabled. */
146 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
147
148 #ifdef THUMB_INTERWORK
149 {
150 /* We want the task to start in thumb mode. */
151 *pxTopOfStack |= portTHUMB_MODE_BIT;
152 }
153 #endif
154
155 pxTopOfStack--;
156
157 /* Interrupt flags cannot always be stored on the stack and will
158 * instead be stored in a variable, which is then saved as part of the
159 * tasks context. */
160 *pxTopOfStack = portNO_CRITICAL_NESTING;
161
162 return pxTopOfStack;
163 }
164 /*-----------------------------------------------------------*/
165
xPortStartScheduler(void)166 BaseType_t xPortStartScheduler( void )
167 {
168 extern void vPortStartFirstTask( void );
169
170 /* Start the timer that generates the tick ISR. Interrupts are disabled
171 * here already. */
172 prvSetupTimerInterrupt();
173
174 /* Start the first task. */
175 vPortStartFirstTask();
176
177 /* Should not get here! */
178 return 0;
179 }
180 /*-----------------------------------------------------------*/
181
vPortEndScheduler(void)182 void vPortEndScheduler( void )
183 {
184 /* It is unlikely that the ARM port will require this function as there
185 * is nothing to return to. */
186 }
187 /*-----------------------------------------------------------*/
188
vPortTickISR(void)189 static __arm void vPortTickISR( void )
190 {
191 volatile uint32_t ulDummy;
192
193 /* Increment the tick count - which may wake some tasks but as the
194 * preemptive scheduler is not being used any woken task is not given
195 * processor time no matter what its priority. */
196 if( xTaskIncrementTick() != pdFALSE )
197 {
198 vTaskSwitchContext();
199 }
200
201 /* Clear the PIT interrupt. */
202 ulDummy = AT91C_BASE_PITC->PITC_PIVR;
203
204 /* To remove compiler warning. */
205 ( void ) ulDummy;
206
207 /* The AIC is cleared in the asm wrapper, outside of this function. */
208 }
209 /*-----------------------------------------------------------*/
210
prvSetupTimerInterrupt(void)211 static void prvSetupTimerInterrupt( void )
212 {
213 const uint32_t ulPeriodIn_uS = ( 1.0 / ( double ) configTICK_RATE_HZ ) * port1SECOND_IN_uS;
214
215 /* Setup the PIT for the required frequency. */
216 PIT_Init( ulPeriodIn_uS, BOARD_MCK / port1MHz_IN_Hz );
217
218 /* Setup the PIT interrupt. */
219 AIC_DisableIT( AT91C_ID_SYS );
220 AIC_ConfigureIT( AT91C_ID_SYS, AT91C_AIC_PRIOR_LOWEST, vPortTickISR );
221 AIC_EnableIT( AT91C_ID_SYS );
222 PIT_EnableIT();
223 }
224 /*-----------------------------------------------------------*/
225
vPortEnterCritical(void)226 void vPortEnterCritical( void )
227 {
228 /* Disable interrupts first! */
229 __disable_irq();
230
231 /* Now that interrupts are disabled, ulCriticalNesting can be accessed
232 * directly. Increment ulCriticalNesting to keep a count of how many times
233 * portENTER_CRITICAL() has been called. */
234 ulCriticalNesting++;
235 }
236 /*-----------------------------------------------------------*/
237
vPortExitCritical(void)238 void vPortExitCritical( void )
239 {
240 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
241 {
242 /* Decrement the nesting count as we are leaving a critical section. */
243 ulCriticalNesting--;
244
245 /* If the nesting level has reached zero then interrupts should be
246 * re-enabled. */
247 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
248 {
249 __enable_irq();
250 }
251 }
252 }
253 /*-----------------------------------------------------------*/
254
