1 /*
2  * FreeRTOS Kernel V11.1.0
3  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4  *
5  * SPDX-License-Identifier: MIT
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy of
8  * this software and associated documentation files (the "Software"), to deal in
9  * the Software without restriction, including without limitation the rights to
10  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11  * the Software, and to permit persons to whom the Software is furnished to do so,
12  * subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in all
15  * copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * https://www.FreeRTOS.org
25  * https://github.com/FreeRTOS
26  *
27  */
28 
29 /* Standard includes. */
30 #include <stdlib.h>
31 
32 /* Scheduler includes. */
33 #include "FreeRTOS.h"
34 #include "task.h"
35 
36 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
37     /* Check the configuration. */
38     #if ( configMAX_PRIORITIES > 32 )
39         #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
40     #endif
41 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
42 
43 #ifndef configSETUP_TICK_INTERRUPT
44     #error configSETUP_TICK_INTERRUPT() must be defined in FreeRTOSConfig.h to call the function that sets up the tick interrupt.
45 #endif
46 
47 #ifndef configCLEAR_TICK_INTERRUPT
48     #error configCLEAR_TICK_INTERRUPT must be defined in FreeRTOSConfig.h to clear which ever interrupt was used to generate the tick interrupt.
49 #endif
50 
51 /* A critical section is exited when the critical section nesting count reaches
52  * this value. */
53 #define portNO_CRITICAL_NESTING          ( ( uint32_t ) 0 )
54 
55 /* Tasks are not created with a floating point context, but can be given a
56  * floating point context after they have been created.  A variable is stored as
57  * part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
58  * does not have an FPU context, or any other value if the task does have an FPU
59  * context. */
60 #define portNO_FLOATING_POINT_CONTEXT    ( ( StackType_t ) 0 )
61 
62 /* Constants required to setup the initial task context. */
63 #define portINITIAL_SPSR                 ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, IRQ enabled FIQ enabled. */
64 #define portTHUMB_MODE_BIT               ( ( StackType_t ) 0x20 )
65 #define portTHUMB_MODE_ADDRESS           ( 0x01UL )
66 
67 /* Masks all bits in the APSR other than the mode bits. */
68 #define portAPSR_MODE_BITS_MASK          ( 0x1F )
69 
70 /* The value of the mode bits in the APSR when the CPU is executing in user
71  * mode. */
72 #define portAPSR_USER_MODE               ( 0x10 )
73 
74 /* Let the user override the pre-loading of the initial LR with the address of
75  * prvTaskExitError() in case it messes up unwinding of the stack in the
76  * debugger. */
77 #ifdef configTASK_RETURN_ADDRESS
78     #define portTASK_RETURN_ADDRESS    configTASK_RETURN_ADDRESS
79 #else
80     #define portTASK_RETURN_ADDRESS    prvTaskExitError
81 #endif
82 
83 /*-----------------------------------------------------------*/
84 
85 /*
86  * Starts the first task executing.  This function is necessarily written in
87  * assembly code so is implemented in portASM.s.
88  */
89 extern void vPortRestoreTaskContext( void );
90 
91 /*
92  * Used to catch tasks that attempt to return from their implementing function.
93  */
94 static void prvTaskExitError( void );
95 
96 /*-----------------------------------------------------------*/
97 
98 /* A variable is used to keep track of the critical section nesting.  This
99  * variable has to be stored as part of the task context and must be initialised to
100  * a non zero value to ensure interrupts don't inadvertently become unmasked before
101  * the scheduler starts.  As it is stored as part of the task context it will
102  * automatically be set to 0 when the first task is started. */
103 volatile uint32_t ulCriticalNesting = 9999UL;
104 
105 /* Saved as part of the task context.  If ulPortTaskHasFPUContext is non-zero then
106  * a floating point context must be saved and restored for the task. */
107 volatile uint32_t ulPortTaskHasFPUContext = pdFALSE;
108 
109 /* Set to 1 to pend a context switch from an ISR. */
110 volatile uint32_t ulPortYieldRequired = pdFALSE;
111 
112 /* Counts the interrupt nesting depth.  A context switch is only performed if
113  * if the nesting depth is 0. */
114 volatile uint32_t ulPortInterruptNesting = 0UL;
115 
116 /*-----------------------------------------------------------*/
117 
118 /*
119  * See header file for description.
120  */
pxPortInitialiseStack(StackType_t * pxTopOfStack,TaskFunction_t pxCode,void * pvParameters)121 StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
122                                      TaskFunction_t pxCode,
123                                      void * pvParameters )
124 {
125     /* Setup the initial stack of the task.  The stack is set exactly as
126      * expected by the portRESTORE_CONTEXT() macro.
127      *
128      * The fist real value on the stack is the status register, which is set for
129      * system mode, with interrupts enabled.  A few NULLs are added first to ensure
130      * GDB does not try decoding a non-existent return address. */
131     *pxTopOfStack = ( StackType_t ) NULL;
132     pxTopOfStack--;
133     *pxTopOfStack = ( StackType_t ) NULL;
134     pxTopOfStack--;
135     *pxTopOfStack = ( StackType_t ) NULL;
136     pxTopOfStack--;
137     *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
138 
139     if( ( ( uint32_t ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL )
140     {
141         /* The task will start in THUMB mode. */
142         *pxTopOfStack |= portTHUMB_MODE_BIT;
143     }
144 
145     pxTopOfStack--;
146 
147     /* Next the return address, which in this case is the start of the task. */
148     *pxTopOfStack = ( StackType_t ) pxCode;
149     pxTopOfStack--;
150 
151     /* Next all the registers other than the stack pointer. */
152     *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* R14 */
153     pxTopOfStack--;
154     *pxTopOfStack = ( StackType_t ) 0x12121212;              /* R12 */
155     pxTopOfStack--;
156     *pxTopOfStack = ( StackType_t ) 0x11111111;              /* R11 */
157     pxTopOfStack--;
158     *pxTopOfStack = ( StackType_t ) 0x10101010;              /* R10 */
159     pxTopOfStack--;
160     *pxTopOfStack = ( StackType_t ) 0x09090909;              /* R9 */
161     pxTopOfStack--;
162     *pxTopOfStack = ( StackType_t ) 0x08080808;              /* R8 */
163     pxTopOfStack--;
164     *pxTopOfStack = ( StackType_t ) 0x07070707;              /* R7 */
165     pxTopOfStack--;
166     *pxTopOfStack = ( StackType_t ) 0x06060606;              /* R6 */
167     pxTopOfStack--;
168     *pxTopOfStack = ( StackType_t ) 0x05050505;              /* R5 */
169     pxTopOfStack--;
170     *pxTopOfStack = ( StackType_t ) 0x04040404;              /* R4 */
171     pxTopOfStack--;
172     *pxTopOfStack = ( StackType_t ) 0x03030303;              /* R3 */
173     pxTopOfStack--;
174     *pxTopOfStack = ( StackType_t ) 0x02020202;              /* R2 */
175     pxTopOfStack--;
176     *pxTopOfStack = ( StackType_t ) 0x01010101;              /* R1 */
177     pxTopOfStack--;
178     *pxTopOfStack = ( StackType_t ) pvParameters;            /* R0 */
179     pxTopOfStack--;
180 
181     /* The task will start with a critical nesting count of 0 as interrupts are
182      * enabled. */
183     *pxTopOfStack = portNO_CRITICAL_NESTING;
184     pxTopOfStack--;
185 
186     /* The task will start without a floating point context.  A task that uses
187      * the floating point hardware must call vPortTaskUsesFPU() before executing
188      * any floating point instructions. */
189     *pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;
190 
191     return pxTopOfStack;
192 }
193 /*-----------------------------------------------------------*/
194 
prvTaskExitError(void)195 static void prvTaskExitError( void )
196 {
197     /* A function that implements a task must not exit or attempt to return to
198      * its caller as there is nothing to return to.  If a task wants to exit it
199      * should instead call vTaskDelete( NULL ).
200      *
201      * Artificially force an assert() to be triggered if configASSERT() is
202      * defined, then stop here so application writers can catch the error. */
203     configASSERT( ulPortInterruptNesting == ~0UL );
204     portDISABLE_INTERRUPTS();
205 
206     for( ; ; )
207     {
208     }
209 }
210 /*-----------------------------------------------------------*/
211 
xPortStartScheduler(void)212 BaseType_t xPortStartScheduler( void )
213 {
214     uint32_t ulAPSR;
215 
216     /* Only continue if the CPU is not in User mode.  The CPU must be in a
217      * Privileged mode for the scheduler to start. */
218     __asm volatile ( "MRS %0, APSR" : "=r" ( ulAPSR ) );
219 
220     ulAPSR &= portAPSR_MODE_BITS_MASK;
221     configASSERT( ulAPSR != portAPSR_USER_MODE );
222 
223     if( ulAPSR != portAPSR_USER_MODE )
224     {
225         /* Start the timer that generates the tick ISR. */
226         portDISABLE_INTERRUPTS();
227         configSETUP_TICK_INTERRUPT();
228 
229         /* Start the first task executing. */
230         vPortRestoreTaskContext();
231     }
232 
233     /* Will only get here if vTaskStartScheduler() was called with the CPU in
234      * a non-privileged mode or the binary point register was not set to its lowest
235      * possible value.  prvTaskExitError() is referenced to prevent a compiler
236      * warning about it being defined but not referenced in the case that the user
237      * defines their own exit address. */
238     ( void ) prvTaskExitError;
239     return 0;
240 }
241 /*-----------------------------------------------------------*/
242 
vPortEndScheduler(void)243 void vPortEndScheduler( void )
244 {
245     /* Not implemented in ports where there is nothing to return to.
246      * Artificially force an assert. */
247     configASSERT( ulCriticalNesting == 1000UL );
248 }
249 /*-----------------------------------------------------------*/
250 
vPortEnterCritical(void)251 void vPortEnterCritical( void )
252 {
253     portDISABLE_INTERRUPTS();
254 
255     /* Now that interrupts are disabled, ulCriticalNesting can be accessed
256      * directly.  Increment ulCriticalNesting to keep a count of how many times
257      * portENTER_CRITICAL() has been called. */
258     ulCriticalNesting++;
259 
260     /* This is not the interrupt safe version of the enter critical function so
261      * assert() if it is being called from an interrupt context.  Only API
262      * functions that end in "FromISR" can be used in an interrupt.  Only assert if
263      * the critical nesting count is 1 to protect against recursive calls if the
264      * assert function also uses a critical section. */
265     if( ulCriticalNesting == 1 )
266     {
267         configASSERT( ulPortInterruptNesting == 0 );
268     }
269 }
270 /*-----------------------------------------------------------*/
271 
vPortExitCritical(void)272 void vPortExitCritical( void )
273 {
274     if( ulCriticalNesting > portNO_CRITICAL_NESTING )
275     {
276         /* Decrement the nesting count as the critical section is being
277          * exited. */
278         ulCriticalNesting--;
279 
280         /* If the nesting level has reached zero then all interrupt
281          * priorities must be re-enabled. */
282         if( ulCriticalNesting == portNO_CRITICAL_NESTING )
283         {
284             /* Critical nesting has reached zero so all interrupt priorities
285              * should be unmasked. */
286             portENABLE_INTERRUPTS();
287         }
288     }
289 }
290 /*-----------------------------------------------------------*/
291 
FreeRTOS_Tick_Handler(void)292 void FreeRTOS_Tick_Handler( void )
293 {
294     uint32_t ulInterruptStatus;
295 
296     ulInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
297 
298     /* Increment the RTOS tick. */
299     if( xTaskIncrementTick() != pdFALSE )
300     {
301         ulPortYieldRequired = pdTRUE;
302     }
303 
304     portCLEAR_INTERRUPT_MASK_FROM_ISR( ulInterruptStatus );
305 
306     configCLEAR_TICK_INTERRUPT();
307 }
308 /*-----------------------------------------------------------*/
309 
vPortTaskUsesFPU(void)310 void vPortTaskUsesFPU( void )
311 {
312     uint32_t ulInitialFPSCR = 0;
313 
314     /* A task is registering the fact that it needs an FPU context.  Set the
315      * FPU flag (which is saved as part of the task context). */
316     ulPortTaskHasFPUContext = pdTRUE;
317 
318     /* Initialise the floating point status register. */
319     __asm volatile ( "FMXR  FPSCR, %0" ::"r" ( ulInitialFPSCR ) );
320 }
321 /*-----------------------------------------------------------*/
322