1 /*
2  * FreeRTOS Kernel V11.1.0
3  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4  *
5  * SPDX-License-Identifier: MIT
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy of
8  * this software and associated documentation files (the "Software"), to deal in
9  * the Software without restriction, including without limitation the rights to
10  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11  * the Software, and to permit persons to whom the Software is furnished to do so,
12  * subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in all
15  * copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * https://www.FreeRTOS.org
25  * https://github.com/FreeRTOS
26  *
27  */
28 
29 
30 /*-----------------------------------------------------------
31 * Implementation of functions defined in portable.h for the ARM7 port.
32 *
33 * Components that can be compiled to either ARM or THUMB mode are
34 * contained in this file.  The ISR routines, which can only be compiled
35 * to ARM mode are contained in portISR.c.
36 *----------------------------------------------------------*/
37 
38 
39 /* Standard includes. */
40 #include <stdlib.h>
41 
42 /* Scheduler includes. */
43 #include "FreeRTOS.h"
44 #include "task.h"
45 
46 /* Constants required to setup the task context. */
47 #define portINITIAL_SPSR                   ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
48 #define portTHUMB_MODE_BIT                 ( ( StackType_t ) 0x20 )
49 #define portINSTRUCTION_SIZE               ( ( StackType_t ) 4 )
50 #define portNO_CRITICAL_SECTION_NESTING    ( ( StackType_t ) 0 )
51 
52 /* Constants required to setup the tick ISR. */
53 #define portENABLE_TIMER                   ( ( uint8_t ) 0x01 )
54 #define portPRESCALE_VALUE                 0x00
55 #define portINTERRUPT_ON_MATCH             ( ( uint32_t ) 0x01 )
56 #define portRESET_COUNT_ON_MATCH           ( ( uint32_t ) 0x02 )
57 
58 /* Constants required to setup the VIC for the tick ISR. */
59 #define portTIMER_VIC_CHANNEL              ( ( uint32_t ) 0x0004 )
60 #define portTIMER_VIC_CHANNEL_BIT          ( ( uint32_t ) 0x0010 )
61 #define portTIMER_VIC_ENABLE               ( ( uint32_t ) 0x0020 )
62 
63 /*-----------------------------------------------------------*/
64 
65 /* Setup the timer to generate the tick interrupts. */
66 static void prvSetupTimerInterrupt( void );
67 
68 /*
69  * The scheduler can only be started from ARM mode, so
70  * vPortISRStartFirstSTask() is defined in portISR.c.
71  */
72 extern void vPortISRStartFirstTask( void );
73 
74 /*-----------------------------------------------------------*/
75 
76 /*
77  * Initialise the stack of a task to look exactly as if a call to
78  * portSAVE_CONTEXT had been called.
79  *
80  * See header file for description.
81  */
pxPortInitialiseStack(StackType_t * pxTopOfStack,TaskFunction_t pxCode,void * pvParameters)82 StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
83                                      TaskFunction_t pxCode,
84                                      void * pvParameters )
85 {
86     StackType_t * pxOriginalTOS;
87 
88     pxOriginalTOS = pxTopOfStack;
89 
90     /* To ensure asserts in tasks.c don't fail, although in this case the assert
91      * is not really required. */
92     pxTopOfStack--;
93 
94     /* Setup the initial stack of the task.  The stack is set exactly as
95      * expected by the portRESTORE_CONTEXT() macro. */
96 
97     /* First on the stack is the return address - which in this case is the
98      * start of the task.  The offset is added to make the return address appear
99      * as it would within an IRQ ISR. */
100     *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
101     pxTopOfStack--;
102 
103     *pxTopOfStack = ( StackType_t ) 0x00000000;    /* R14 */
104     pxTopOfStack--;
105     *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
106     pxTopOfStack--;
107     *pxTopOfStack = ( StackType_t ) 0x12121212;    /* R12 */
108     pxTopOfStack--;
109     *pxTopOfStack = ( StackType_t ) 0x11111111;    /* R11 */
110     pxTopOfStack--;
111     *pxTopOfStack = ( StackType_t ) 0x10101010;    /* R10 */
112     pxTopOfStack--;
113     *pxTopOfStack = ( StackType_t ) 0x09090909;    /* R9 */
114     pxTopOfStack--;
115     *pxTopOfStack = ( StackType_t ) 0x08080808;    /* R8 */
116     pxTopOfStack--;
117     *pxTopOfStack = ( StackType_t ) 0x07070707;    /* R7 */
118     pxTopOfStack--;
119     *pxTopOfStack = ( StackType_t ) 0x06060606;    /* R6 */
120     pxTopOfStack--;
121     *pxTopOfStack = ( StackType_t ) 0x05050505;    /* R5 */
122     pxTopOfStack--;
123     *pxTopOfStack = ( StackType_t ) 0x04040404;    /* R4 */
124     pxTopOfStack--;
125     *pxTopOfStack = ( StackType_t ) 0x03030303;    /* R3 */
126     pxTopOfStack--;
127     *pxTopOfStack = ( StackType_t ) 0x02020202;    /* R2 */
128     pxTopOfStack--;
129     *pxTopOfStack = ( StackType_t ) 0x01010101;    /* R1 */
130     pxTopOfStack--;
131 
132     /* When the task starts is will expect to find the function parameter in
133      * R0. */
134     *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
135     pxTopOfStack--;
136 
137     /* The last thing onto the stack is the status register, which is set for
138      * system mode, with interrupts enabled. */
139     *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
140 
141     if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
142     {
143         /* We want the task to start in thumb mode. */
144         *pxTopOfStack |= portTHUMB_MODE_BIT;
145     }
146 
147     pxTopOfStack--;
148 
149     /* Some optimisation levels use the stack differently to others.  This
150      * means the interrupt flags cannot always be stored on the stack and will
151      * instead be stored in a variable, which is then saved as part of the
152      * tasks context. */
153     *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
154 
155     return pxTopOfStack;
156 }
157 /*-----------------------------------------------------------*/
158 
xPortStartScheduler(void)159 BaseType_t xPortStartScheduler( void )
160 {
161     /* Start the timer that generates the tick ISR.  Interrupts are disabled
162      * here already. */
163     prvSetupTimerInterrupt();
164 
165     /* Start the first task. */
166     vPortISRStartFirstTask();
167 
168     /* Should not get here! */
169     return 0;
170 }
171 /*-----------------------------------------------------------*/
172 
vPortEndScheduler(void)173 void vPortEndScheduler( void )
174 {
175     /* It is unlikely that the ARM port will require this function as there
176      * is nothing to return to.  */
177 }
178 /*-----------------------------------------------------------*/
179 
180 /*
181  * Setup the timer 0 to generate the tick interrupts at the required frequency.
182  */
prvSetupTimerInterrupt(void)183 static void prvSetupTimerInterrupt( void )
184 {
185     uint32_t ulCompareMatch;
186 
187     PCLKSEL0 = ( PCLKSEL0 & ( ~( 0x3 << 2 ) ) ) | ( 0x01 << 2 );
188     T0TCR = 2;  /* Stop and reset the timer */
189     T0CTCR = 0; /* Timer mode               */
190 
191     /* A 1ms tick does not require the use of the timer prescale.  This is
192      * defaulted to zero but can be used if necessary. */
193     T0PR = portPRESCALE_VALUE;
194 
195     /* Calculate the match value required for our wanted tick rate. */
196     ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
197 
198     /* Protect against divide by zero.  Using an if() statement still results
199      * in a warning - hence the #if. */
200     #if portPRESCALE_VALUE != 0
201     {
202         ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
203     }
204     #endif
205     T0MR1 = ulCompareMatch;
206 
207     /* Generate tick with timer 0 compare match. */
208     T0MCR = ( 3 << 3 ); /* Reset timer on match and generate interrupt */
209 
210     /* Setup the VIC for the timer. */
211     VICIntEnable = 0x00000010;
212 
213     /* The ISR installed depends on whether the preemptive or cooperative
214      * scheduler is being used. */
215     #if configUSE_PREEMPTION == 1
216     {
217         extern void( vPreemptiveTick )( void );
218         VICVectAddr4 = ( int32_t ) vPreemptiveTick;
219     }
220     #else
221     {
222         extern void( vNonPreemptiveTick )( void );
223         VICVectAddr4 = ( int32_t ) vNonPreemptiveTick;
224     }
225     #endif
226 
227     VICVectCntl4 = 1;
228 
229     /* Start the timer - interrupts are disabled when this function is called
230      * so it is okay to do this here. */
231     T0TCR = portENABLE_TIMER;
232 }
233 /*-----------------------------------------------------------*/
234