1 /* 2 * FreeRTOS Kernel V11.1.0 3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 * 5 * SPDX-License-Identifier: MIT 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 * this software and associated documentation files (the "Software"), to deal in 9 * the Software without restriction, including without limitation the rights to 10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 * the Software, and to permit persons to whom the Software is furnished to do so, 12 * subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in all 15 * copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * https://www.FreeRTOS.org 25 * https://github.com/FreeRTOS 26 * 27 */ 28 29 /* 30 * The FreeRTOS kernel's RISC-V port is split between the the code that is 31 * common across all currently supported RISC-V chips (implementations of the 32 * RISC-V ISA), and code that tailors the port to a specific RISC-V chip: 33 * 34 * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that 35 * is common to all currently supported RISC-V chips. There is only one 36 * portASM.S file because the same file is built for all RISC-V target chips. 37 * 38 * + Header files called freertos_risc_v_chip_specific_extensions.h contain the 39 * code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V 40 * chip. There are multiple freertos_risc_v_chip_specific_extensions.h files 41 * as there are multiple RISC-V chip implementations. 42 * 43 * !!!NOTE!!! 44 * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h 45 * HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the 46 * compiler's!) include path. For example, if the chip in use includes a core 47 * local interrupter (CLINT) and does not include any chip specific register 48 * extensions then add the path below to the assembler's include path: 49 * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions 50 * 51 */ 52 53 54 #ifndef __FREERTOS_RISC_V_EXTENSIONS_H__ 55 #define __FREERTOS_RISC_V_EXTENSIONS_H__ 56 57 #define portasmHAS_SIFIVE_CLINT 1 58 #define portasmHAS_MTIME 1 59 #define portasmADDITIONAL_CONTEXT_SIZE 0 /* Must be even number on 32-bit cores. */ 60 61 portasmSAVE_ADDITIONAL_REGISTERS MACRO 62 /* No additional registers to save, so this macro does nothing. */ 63 ENDM 64 65 portasmRESTORE_ADDITIONAL_REGISTERS MACRO 66 /* No additional registers to restore, so this macro does nothing. */ 67 ENDM 68 69 #endif /* __FREERTOS_RISC_V_EXTENSIONS_H__ */ 70
