| /Kernel-v10.6.2/.github/workflows/ |
| D | kernel-demos.yml | 17 # Checkout user pull request changes
46 # Checkout user pull request changes
71 # Checkout user pull request changes
100 # Checkout user pull request changes
142 # Checkout user pull request changes
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| D | auto-release.yml | 48 git config --global user.name ${{ github.actor }}
49 git config --global user.email ${{ github.actor }}@users.noreply.github.com
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| /Kernel-v10.6.2/portable/Softune/MB91460/ |
| D | port.c | 44 ORCCR #0x20 ;Switch to user stack
53 ORCCR #0x20 ;Switch to user stack
54 ST R0,@-R15 ;Store PC to User stack
58 ORCCR #0x20 ;Switch to user stack
59 ST R0,@-R15 ;Store PS to User stack
71 ORCCR #0x20 ;Switch to user stack
78 ORCCR #0x20 ;Switch to user stack
173 /* PS - User Mode, USP, ILM=31, Interrupts enabled */ in pxPortInitialiseStack()
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| /Kernel-v10.6.2/portable/IAR/RX100/ |
| D | port_asm.s | 43 Just ensure the current stack is the user stack. */
80 the interrupt occurred from the interrupt stack to the user stack.
85 /* Read the user stack pointer. */
100 /* All the rest of the registers are saved directly to the user stack. */
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| /Kernel-v10.6.2/portable/ThirdParty/XCC/Xtensa/ |
| D | readme_xtensa.txt | 286 the board user manual, and see the output of printf on the terminal.
552 dispatchers that save relevant state and call user-definable handlers.
554 to create and install application-specific user interrupt handlers.
555 Similarly, user-defined handlers can be installed for exceptions (other
583 User Exception and Interrupt Handler (Low/Medium Priority):
585 All Xtensa 'general exceptions' come to the user, kernel, or double
589 to the user vector. Exceptions taken at the other two vectors usually
600 Having allocated the exception stack frame, the user exception handler
604 into a table of user-specified handlers. The correct handler is then
606 returned to the code that caused the exception. The user-defined handler
[all …]
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| D | xtensa_vectors.S | 35 Interrupt handlers and user exception handlers support interaction with
37 after user's specific interrupt handlers. These macros are defined in
74 Because Xtensa is a configurable architecture, this port supports all user
136 Macro dispatch_c_isr - dispatch interrupts to user ISRs.
137 This will dispatch to user handlers (if any) that are registered in the
141 to a user handler - this must be handled by the caller of this macro.
200 /* Now look up in the dispatch table and call user ISR if any. */
336 with index 0 containing the entry for user exceptions.
367 user's interrupt handler code (which may be coded in C) and finally
476 User Exception (including Level 1 Interrupt from user mode).
[all …]
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| D | xtensa_timer.h | 62 and priority. User may specify a timer by defining XT_TIMER_INDEX with -D,
118 User should BE SURE TO ADJUST THIS for the Xtensa platform being used.
144 User may redefine this to an optimal value for the application, either by
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| D | port.c | 58 // User exception dispatcher when exiting
93 frame->exit = ( UBaseType_t ) _xt_user_exit; /* user exception exit dispatcher */ in pxPortInitialiseStack()
95 /* Set initial PS to int level 0, EXCM disabled ('rfe' will enable), user mode. */ in pxPortInitialiseStack()
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| /Kernel-v10.6.2/portable/IAR/RX600/ |
| D | port_asm.s | 43 Just ensure the current stack is the user stack. */
84 the interrupt occurred from the interrupt stack to the user stack.
89 /* Read the user stack pointer. */
104 /* All the rest of the registers are saved directly to the user stack. */
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| /Kernel-v10.6.2/portable/IAR/RXv2/ |
| D | port_asm.s | 43 Just ensure the current stack is the user stack. */
100 the interrupt occurred from the interrupt stack to the user stack.
105 /* Read the user stack pointer. */
120 /* All the rest of the registers are saved directly to the user stack. */
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| /Kernel-v10.6.2/portable/ThirdParty/GCC/Xtensa_ESP32/include/ |
| D | xtensa_timer.h | 40 * User may edit to modify timer selection and to specify clock frequency and
65 * and priority. User may specify a timer by defining XT_TIMER_INDEX with -D,
121 * User should BE SURE TO ADJUST THIS for the Xtensa platform being used.
147 * User may redefine this to an optimal value for the application, either by
|
| /Kernel-v10.6.2/ |
| D | CMakeLists.txt | 3 # User is responsible to one mandatory option:
6 # User is responsible for one library target:
11 # User can choose which heap implementation to use (either the implementations
40 # Heap number or absolute path to custom heap implementation provided by user
51 " A_CUSTOM_PORT - Compiler: User Defined Target: User Defined\n"
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| /Kernel-v10.6.2/portable/GCC/NiosII/ |
| D | port_asm.S | 37 .section .exceptions.entry.user, "xa"
84 .section .exceptions.exit.user, "xa"
138 .section .exceptions.unknown.user
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| /Kernel-v10.6.2/portable/ThirdParty/GCC/ARM_TFM/ |
| D | README.md | 35 Please refer to this [link](https://tf-m-user-guide.trustedfirmware.org/docs/technical_references/i…
55 Please refer to [TF-M documentation](https://tf-m-user-guide.trustedfirmware.org/integration_guide/…
61 Please refer to [TF-M documentation](https://tf-m-user-guide.trustedfirmware.org/integration_guide/…
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| /Kernel-v10.6.2/portable/ThirdParty/GCC/Xtensa_ESP32/ |
| D | xtensa_vectors.S | 38 Interrupt handlers and user exception handlers support interaction with
40 after user's specific interrupt handlers. These macros are defined in
77 Because Xtensa is a configurable architecture, this port supports all user
194 Macro dispatch_c_isr - dispatch interrupts to user ISRs.
195 This will dispatch to user handlers (if any) that are registered in the
199 to a user handler - this must be handled by the caller of this macro.
283 /* Now look up in the dispatch table and call user ISR if any. */
479 with index 0 containing the entry for user exceptions.
513 user's interrupt handler code (which may be coded in C) and finally
607 User Exception (including Level 1 Interrupt from user mode).
[all …]
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| /Kernel-v10.6.2/portable/ThirdParty/GCC/ATmega/ |
| D | readme.md | 12 - TimerN - a 16-bit Timer which will be configured by the user.
59 To avoid this issue causing `pvPort_Malloc()` to failing, the user needs to issue this tuning state…
67 For devices which can support __XRAM__ the user will need to tune the location of stack and heap ac…
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| /Kernel-v10.6.2/portable/IAR/ARM_CRx_No_GIC/ |
| D | port.c | 70 /* The value of the mode bits in the APSR when the CPU is executing in user
74 /* Let the user override the pre-loading of the initial LR with the address of
211 /* Only continue if the CPU is not in User mode. The CPU must be in a in xPortStartScheduler()
230 warning about it being defined but not referenced in the case that the user in xPortStartScheduler()
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| /Kernel-v10.6.2/portable/Renesas/RX200/ |
| D | port.c | 195 Just ensure the current stack is the user stack. */ in prvStartFirstTask()
246 the interrupt occurred from the interrupt stack to the user stack. in prvYieldHandler()
251 /* Read the user stack pointer. */ in prvYieldHandler()
266 /* All the rest of the registers are saved directly to the user stack. */ in prvYieldHandler()
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| /Kernel-v10.6.2/portable/Renesas/RX600/ |
| D | port.c | 194 Just ensure the current stack is the user stack. */ in prvStartFirstTask()
247 the interrupt occurred from the interrupt stack to the user stack. in prvYieldHandler()
252 /* Read the user stack pointer. */ in prvYieldHandler()
267 /* All the rest of the registers are saved directly to the user stack. */ in prvYieldHandler()
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| /Kernel-v10.6.2/portable/GCC/ARM_CRx_No_GIC/ |
| D | port.c | 70 /* The value of the mode bits in the APSR when the CPU is executing in user
74 /* Let the user override the pre-loading of the initial LR with the address of
214 /* Only continue if the CPU is not in User mode. The CPU must be in a in xPortStartScheduler()
233 warning about it being defined but not referenced in the case that the user in xPortStartScheduler()
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| /Kernel-v10.6.2/portable/GCC/RX600/ |
| D | port.c | 221 Just ensure the current stack is the user stack. */ in prvStartFirstTask()
264 the interrupt occurred from the interrupt stack to the user stack. in vSoftwareInterruptISR()
269 /* Read the user stack pointer. */ in vSoftwareInterruptISR()
284 /* All the rest of the registers are saved directly to the user stack. */ in vSoftwareInterruptISR()
|
| /Kernel-v10.6.2/portable/Renesas/RX600v2/ |
| D | port.c | 206 Just ensure the current stack is the user stack. */ in prvStartFirstTask()
267 the interrupt occurred from the interrupt stack to the user stack. in prvYieldHandler()
272 /* Read the user stack pointer. */ in prvYieldHandler()
287 /* All the rest of the registers are saved directly to the user stack. */ in prvYieldHandler()
|
| /Kernel-v10.6.2/portable/GCC/RX200/ |
| D | port.c | 230 Just ensure the current stack is the user stack. */ in prvStartFirstTask()
289 the interrupt occurred from the interrupt stack to the user stack. in vSoftwareInterruptISR()
294 /* Read the user stack pointer. */ in vSoftwareInterruptISR()
309 /* All the rest of the registers are saved directly to the user stack. */ in vSoftwareInterruptISR()
|
| /Kernel-v10.6.2/portable/GCC/RX600v2/ |
| D | port.c | 224 Just ensure the current stack is the user stack. */ in prvStartFirstTask()
283 the interrupt occurred from the interrupt stack to the user stack. in vSoftwareInterruptISR()
288 /* Read the user stack pointer. */ in vSoftwareInterruptISR()
303 /* All the rest of the registers are saved directly to the user stack. */ in vSoftwareInterruptISR()
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| /Kernel-v10.6.2/portable/Renesas/RX100/ |
| D | port.c | 112 /* The user has not provided their own tick interrupt configuration so use
278 Just ensure the current stack is the user stack. */ in prvStartFirstTask()
340 when the interrupt occurred from the interrupt stack to the user stack. in prvYieldHandler()
345 /* Read the user stack pointer. */ in prvYieldHandler()
360 /* All the rest of the registers are saved directly to the user stack. */ in prvYieldHandler()
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