Searched full:port (Results 1 – 25 of 449) sorted by relevance
12345678910>>...18
| /Kernel-v11.1.0/ |
| D | sbom.spdx | 74 FileName: ./portable/WizC/PIC18/port.c
75 SPDXID: SPDXRef-File-portable-WizC-PIC18-port.c
95 FileName: ./portable/Rowley/MSP430F449/port.c
96 SPDXID: SPDXRef-File-portable-Rowley-MSP430F449-port.c
102 FileName: ./portable/CCS/ARM_CM3/port.c
103 SPDXID: SPDXRef-File-portable-CCS-ARMCM3-port.c
109 FileName: ./portable/CCS/ARM_CM4F/port.c
110 SPDXID: SPDXRef-File-portable-CCS-ARMCM4F-port.c
116 FileName: ./portable/CCS/ARM_Cortex-R4/port.c
117 SPDXID: SPDXRef-File-portable-CCS-ARMCortex-R4-port.c
[all …]
|
| D | History.txt | 5 + Add ARMv7-R port with Memory Protection Unit (MPU) support.
6 + Add Memory Protection Unit (MPU) support to the Cortex-M0 port.
37 + Add 64-bit support to the FreeRTOS Windows Simulator port. We thank @watsk
39 + Add support for 64-bit Microblaze processor to the MicroblazeV9 port. We
42 the MSP430F449 port to make it work with both MSP430 GCC and MSPGCC
47 + Update the POSIX port to pass the FreeRTOS task name to pthread for
49 + Update the POSIX port to ignore the user specified stack memory and only
53 + Update the POSIX port to use a timer thread for tick interrupts instead of
56 + Update ARM_TFM port to support TF-Mv2.0.0 release of trusted-firmware-m.
64 vApplicationGetTimerTaskMemory() in the RP2040 port. We thank @dpslwk for
[all …]
|
| /Kernel-v11.1.0/portable/ |
| D | CMakeLists.txt | 19 # TEMPLATE Port
21 template/port.c>
26 BCC/16BitDOS/Flsh186/port.c>
30 BCC/16BitDOS/PC/port.c>
32 # ARMv7-M port for Texas Instruments Code Composer Studio
34 CCS/ARM_CM3/port.c
37 # ARMv7E-M port for Texas Instruments Code Composer Studio
39 CCS/ARM_CM4F/port.c
42 # ARMv7-R port for Texas Instruments Code Composer Studio
44 CCS/ARM_Cortex-R4/port.c
[all …]
|
| D | readme.txt | 1 Each real time kernel port consists of three files that contain the core kernel
2 components and are common to every port, and one or more files that are
15 For example, if you are interested in the [compiler] port for the [architecture]
16 microcontroller, then the port specific files are contained in
18 only port you are interested in then all the other directories can be
|
| /Kernel-v11.1.0/portable/GCC/ARM_CRx_MPU/ |
| D | portmacro.h | 33 * @brief Functions, Defines, and Structs for use in the ARM_CRx_MPU FreeRTOS-Port
54 #error This port is usable with MPU wrappers V2 only.
109 /* ------------------------------ Port Type Definitions ------------------------------ */
141 * @ingroup Port Interface Specifications
148 * @ingroup Port Interface Specifications
155 * @ingroup Port Interface Specifications
170 * @ingroup Port Interface Specifications
177 * @ingroup Port Interface Specifications
184 * @ingroup Port Interface Specifications
186 * @note This is not required for this port but included in case common demo
[all …]
|
| /Kernel-v11.1.0/portable/ThirdParty/ |
| D | README.md | 12 FreeRTOS team supported third party FreeRTOS port:
20 A new FreeRTOS port cannot be directly contributed to this location. Instead,
22 community supported FreeRTOS port based on the community interest.
29 supported FreeRTOS port:
36 A new FreeRTOS port can be directly contributed by a partner. The process to
37 contribute a FreeRTOS port is documented [here](https://github.com/FreeRTOS/FreeRTOS-Kernel-Partner…
44 community supported FreeRTOS port:
47 * Tests may or may not exist for the FreeRTOS port.
50 A new FreeRTOS port can be directly contributed by anyone. The process to
51 contribute a FreeRTOS port is documented [here](https://github.com/FreeRTOS/FreeRTOS-Kernel-Communi…
|
| /Kernel-v11.1.0/portable/GCC/ARM_CA53_64_BIT/ |
| D | README.md | 1 # ARM_CA53_64_BIT port
3 Initial port to support Armv8-A architecture in FreeRTOS kernel was written for
9 This port is generic and can be used as a starting point for other Armv8-A
10 application processors. Therefore, the port `ARM_CA53_64_BIT` is renamed as
11 `ARM_AARCH64`. The existing projects that use old port `ARM_CA53_64_BIT`,
12 should migrate to renamed port `ARM_AARCH64`.
16 This port uses memory mapped interface to access Arm GIC registers.
|
| /Kernel-v11.1.0/portable/GCC/ARM_CA53_64_BIT_SRE/ |
| D | README.md | 1 # ARM_CA53_64_BIT_SRE port
3 Initial port to support Armv8-A architecture in FreeRTOS kernel was written for
9 This port is generic and can be used as a starting point for other Armv8-A
10 application processors. Therefore, the port `ARM_AARCH64_SRE` is renamed as
11 `ARM_AARCH64_SRE`. The existing projects that use old port `ARM_AARCH64_SRE`,
12 should migrate to renamed port `ARM_AARCH64_SRE`.
16 This port uses System Register interface to access Arm GIC registers.
|
| /Kernel-v11.1.0/portable/IAR/ARM_CM7/ |
| D | ReadMe.txt | 6 the FreeRTOS port provided specifically for r0p1 revisions, as that can be used
9 The first option is to use the ARM Cortex-M4F port, and the second option is to
10 use the Cortex-M7 r0p1 port - the latter containing a minor errata workaround.
13 used, but it is recommended to use the FreeRTOS ARM Cortex-M4F port located in
17 Cortex-M7 r0p1 port located in the /FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1
|
| /Kernel-v11.1.0/portable/GCC/ARM_CM7/ |
| D | ReadMe.txt | 6 the FreeRTOS port provided specifically for r0p1 revisions, as that can be used
9 The first option is to use the ARM Cortex-M4F port, and the second option is to
10 use the Cortex-M7 r0p1 port - the latter containing a minor errata workaround.
13 used, but it is recommended to use the FreeRTOS ARM Cortex-M4F port located in
17 Cortex-M7 r0p1 port located in the /FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1
|
| /Kernel-v11.1.0/portable/RVDS/ARM_CM7/ |
| D | ReadMe.txt | 6 the FreeRTOS port provided specifically for r0p1 revisions, as that can be used
9 The first option is to use the ARM Cortex-M4F port, and the second option is to
10 use the Cortex-M7 r0p1 port - the latter containing a minor errata workaround.
13 used, but it is recommended to use the FreeRTOS ARM Cortex-M4F port located in
17 Cortex-M7 r0p1 port located in the /FreeRTOS/Source/portable/RVDS/ARM_CM7/r0p1
|
| /Kernel-v11.1.0/portable/ThirdParty/GCC/ARM_TFM/ |
| D | README.md | 1 # Target of this port
3 This port adds the support that FreeRTOS applications can call the secure
24 To build a project based on this port:
32 …edfirmware.org/TF-M/trusted-firmware-m.git/) to get the source code. This port is supported by TF-…
41 …le/ThirdParty/GCC/ARM_TFM` folder before using this port. Note that TrustZone is enabled in this p…
48 This macro should be configured as 0. In this port, TF-M runs in the Secure Side while FreeRTOS
|
| /Kernel-v11.1.0/portable/ThirdParty/XCC/Xtensa/ |
| D | readme_xtensa.txt | 1 FreeRTOS Port for Xtensa Configurable and Diamond Processors
10 This document describes the Xtensa port for FreeRTOS multitasking RTOS.
14 This port currently works with FreeRTOS kernel version 10.0.0.
21 features. This port supports all of them, including custom processor
24 your application for your Xtensa configuration. The port uses the Xtensa
31 This port includes optional reentrancy support for the 'newlib' and
41 This port also includes a simple example application that may run on
43 are also a couple of test programs used in maintaining the port, which
69 The Xtensa port of FreeRTOS is available at this location:
74 to build the port. You can also download the official release of FreeRTOS
[all …]
|
| /Kernel-v11.1.0/portable/GCC/RX600/ |
| D | readme.txt | 1 The following table shows which port is recommended to be used.
4 RX MCU Group CPU FPU FPU Port Layer
46 the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems …
50 functionality is used, please modify port.c for the configuration. Please be aware that port.c is
62 …: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port.
|
| /Kernel-v11.1.0/portable/GCC/RX600v2/ |
| D | readme.txt | 1 The following table shows which port is recommended to be used.
4 RX MCU Group CPU FPU FPU Port Layer
46 the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems …
50 functionality is used, please modify port.c for the configuration. Please be aware that port.c is
62 …: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port.
|
| /Kernel-v11.1.0/portable/IAR/RX600/ |
| D | readme.txt | 1 The following table shows which port is recommended to be used.
4 RX MCU Group CPU FPU FPU Port Layer
46 the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems …
50 functionality is used, please modify port.c for the configuration. Please be aware that port.c is
62 …: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port.
|
| /Kernel-v11.1.0/portable/IAR/RX700v3_DPFPU/ |
| D | readme.txt | 1 The following table shows which port is recommended to be used.
4 RX MCU Group CPU FPU FPU Port Layer
46 the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems …
50 functionality is used, please modify port.c for the configuration. Please be aware that port.c is
62 …: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port.
|
| /Kernel-v11.1.0/portable/IAR/RX100/ |
| D | readme.txt | 1 The following table shows which port is recommended to be used.
4 RX MCU Group CPU FPU FPU Port Layer
46 the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems …
50 functionality is used, please modify port.c for the configuration. Please be aware that port.c is
62 …: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port.
|
| /Kernel-v11.1.0/portable/Renesas/RX100/ |
| D | readme.txt | 1 The following table shows which port is recommended to be used.
4 RX MCU Group CPU FPU FPU Port Layer
46 the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems …
50 functionality is used, please modify port.c for the configuration. Please be aware that port.c is
62 …: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port.
|
| /Kernel-v11.1.0/portable/GCC/RX700v3_DPFPU/ |
| D | readme.txt | 1 The following table shows which port is recommended to be used.
4 RX MCU Group CPU FPU FPU Port Layer
46 the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems …
50 functionality is used, please modify port.c for the configuration. Please be aware that port.c is
62 …: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port.
|
| /Kernel-v11.1.0/portable/IAR/RXv2/ |
| D | readme.txt | 1 The following table shows which port is recommended to be used.
4 RX MCU Group CPU FPU FPU Port Layer
46 the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems …
50 functionality is used, please modify port.c for the configuration. Please be aware that port.c is
62 …: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port.
|
| /Kernel-v11.1.0/portable/Renesas/RX700v3_DPFPU/ |
| D | readme.txt | 1 The following table shows which port is recommended to be used.
4 RX MCU Group CPU FPU FPU Port Layer
46 the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems …
50 functionality is used, please modify port.c for the configuration. Please be aware that port.c is
62 …: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port.
|
| /Kernel-v11.1.0/portable/GCC/RX100/ |
| D | readme.txt | 1 The following table shows which port is recommended to be used.
4 RX MCU Group CPU FPU FPU Port Layer
46 the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems …
50 functionality is used, please modify port.c for the configuration. Please be aware that port.c is
62 …: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port.
|
| /Kernel-v11.1.0/portable/Renesas/RX200/ |
| D | readme.txt | 1 The following table shows which port is recommended to be used.
4 RX MCU Group CPU FPU FPU Port Layer
46 the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems …
50 functionality is used, please modify port.c for the configuration. Please be aware that port.c is
62 …: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port.
|
| /Kernel-v11.1.0/portable/Renesas/RX600/ |
| D | readme.txt | 1 The following table shows which port is recommended to be used.
4 RX MCU Group CPU FPU FPU Port Layer
46 the configuration function. Please be aware that port.c is hard coded to use CMT0 though it seems …
50 functionality is used, please modify port.c for the configuration. Please be aware that port.c is
62 …: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port.
|
12345678910>>...18
