Home
last modified time | relevance | path

Searched +full:newlib +full:- +full:source (Results 1 – 6 of 6) sorted by relevance

/Kernel-v11.1.0/portable/GCC/AVR32_UC3/
Dport.c5 * SPDX-License-Identifier: MIT AND BSD-3-Clause
33 * \brief FreeRTOS port source for AVR32 UC3.
35 * - Compiler: GNU GCC for AVR32
36 * - Supported devices: All AVR32 devices can be used.
37 * - AppNote:
48 * Redistribution and use in source and binary forms, with or without
51 * 1. Redistributions of source code must retain the above copyright notice,
107 /*-----------------------------------------------------------*/
110 * Low-level initialization routine called during startup, before the main
112 * This version comes in replacement to the default one provided by Newlib.
[all …]
/Kernel-v11.1.0/.github/workflows/
Dkernel-demos.yml1 name: FreeRTOS-Kernel Demos
6 bashPass: \033[32;1mPASSED -
7 bashInfo: \033[33;1mINFO -
8 bashFail: \033[31;1mFAILED -
12 WIN32-MSVC:
14 runs-on: windows-latest
16 - name: Checkout the FreeRTOS/FreeRTOS Repository
22 fetch-depth: 1
25 - name: Checkout Pull Request
28 path: ./FreeRTOS/Source
[all …]
/Kernel-v11.1.0/portable/ThirdParty/XCC/Xtensa/
Dreadme_xtensa.txt8 ------------
18 --------------------------------------------------
26 NOTE: It may be possible to build and run this with the open-source
27 xtensa-linux tools provided you have the correct overlay for your Xtensa
31 This port includes optional reentrancy support for the 'newlib' and
33 thread-safety on a per task basis (for use in tasks only, not interrupt
36 NOTE: At this time only 'newlib' and 'xclib' C libraries are supported
48 - Timer interrupt option with at least one interruptible timer.
49 - Interrupt option (implied by the timer interrupt option).
50 - Exception Architecture 2 (XEA2). Please note that XEA1 is NOT supported.
[all …]
/Kernel-v11.1.0/examples/template_configuration/
DFreeRTOSConfig.h5 * SPDX-License-Identifier: MIT
56 /* configSYSTICK_CLOCK_HZ is an optional parameter for ARM Cortex-M ports only.
58 * By default ARM Cortex-M ports generate the RTOS tick interrupt from the
59 * Cortex-M SysTick timer. Most Cortex-M MCUs run the SysTick timer at the same
60 * frequency as the MCU itself - when that is the case configSYSTICK_CLOCK_HZ is
80 /* Set configUSE_PREEMPTION to 1 to use pre-emptive scheduling. Set
81 * configUSE_PREEMPTION to 0 to use co-operative scheduling.
82 * See https://www.freertos.org/single-core-amp-smp-rtos-scheduling.html. */
89 * https://freertos.org/single-core-amp-smp-rtos-scheduling.html. */
93 * run using an algorithm optimised to the instruction set of the target hardware -
[all …]
/Kernel-v11.1.0/
DHistory.txt5 + Add ARMv7-R port with Memory Protection Unit (MPU) support.
6 + Add Memory Protection Unit (MPU) support to the Cortex-M0 port.
8 buffer when a task reads from a non-empty buffer:
9 - The task reading from a non-empty stream buffer returns immediately
11 - The task reading from a non-empty steam batching buffer blocks until the
37 + Add 64-bit support to the FreeRTOS Windows Simulator port. We thank @watsk
39 + Add support for 64-bit Microblaze processor to the MicroblazeV9 port. We
43 compilers. We thank @Forty-Bot for their contribution.
54 POSIX timers to address issues with signal handling in non-FreeRTOS
56 + Update ARM_TFM port to support TF-Mv2.0.0 release of trusted-firmware-m.
[all …]
/Kernel-v11.1.0/include/
DFreeRTOS.h5 * SPDX-License-Identifier: MIT
39 * + If using GCC ensure the -nostdint options is *not* being used.
48 * in FreeRTOS/source/stdint.readme for more information.
52 /* *INDENT-OFF* */
56 /* *INDENT-ON* */
117 #include "newlib-freertos.h"
128 #include "picolibc-freertos.h"
231 * the project's FreeRTOSConfig.h probably pre-dates the introduction of
605 /* Used to perform any necessary initialisation - for example, open a file
2796 /* By default per-instance callbacks are not enabled for stream buffer or message buffer. */
[all …]