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/Kernel-v11.1.0/.github/workflows/
Dkernel-checks.yml50 # Copy the common tools from the FreeRTOS/FreeRTOS repo.
51 mv tools/.github/scripts/common inspect/.github/scripts
54 pip install -r inspect/.github/scripts/common/requirements.txt
/Kernel-v11.1.0/portable/IAR/RISC-V/chip_specific_extensions/
Dreadme.txt3 * common across all currently supported RISC-V chips (implementations of the
7 * is common to all currently supported RISC-V chips. There is only one
/Kernel-v11.1.0/portable/IAR/RISC-V/
Dreadme.txt3 * common across all currently supported RISC-V chips (implementations of the
7 * is common to all currently supported RISC-V chips. There is only one
/Kernel-v11.1.0/portable/GCC/RISC-V/chip_specific_extensions/
Dreadme.txt3 * common across all currently supported RISC-V chips (implementations of the
7 * is common to all currently supported RISC-V chips. There is only one
/Kernel-v11.1.0/portable/GCC/RISC-V/
Dreadme.txt3 * common across all currently supported RISC-V chips (implementations of the
7 * is common to all currently supported RISC-V chips. There is only one
/Kernel-v11.1.0/portable/IAR/V850ES/
Dportasm_Hx2.s85283 COMMON INTVEC:CODE:ROOT(2)
292 COMMON INTVEC:CODE:ROOT(2)
300 COMMON INTVEC:CODE:ROOT(2)
317 COMMON INTVEC:CODE:ROOT(2)
329 COMMON INTVEC:CODE:ROOT(4)
339 COMMON INTVEC:CODE:ROOT(4)
Dportasm_Fx3.s85292 COMMON INTVEC:CODE:ROOT(2)
301 COMMON INTVEC:CODE:ROOT(2)
309 COMMON INTVEC:CODE:ROOT(2)
326 COMMON INTVEC:CODE:ROOT(2)
Dportasm.s85283 COMMON INTVEC:CODE:ROOT(2)
292 COMMON INTVEC:CODE:ROOT(2)
300 COMMON INTVEC:CODE:ROOT(2)
/Kernel-v11.1.0/
DREADME.md117 - The root of this repository contains the three files that are common to
181 [portable/MemMang](portable/MemMang), and [portable/Common](portable/Common)
DHistory.txt77 kernel common code and the kernel port code. We thank @barnatahmed for
1125 + Ensure none of the variables in the common kernel files are initialised to
1281 + Updated all Cortex-A9 ports to help trap a couple of common usage errors -
1573 files have been removed from FreeRTOS/Demo/Common.
1618 + Added the QueueSet.c common demo/test file. Several demo applications
1934 FreeRTOS/Demo/Common/Utils/CommandInterpreter.c. This is still a work in
1946 + lwIP V1.4.0 is now included in the FreeRTOS/Demo/Common directory, and
1975 + Introduced a new common demo application file to exercise the new timer
2058 + Fixed some build time compiler warnings in Demo/Common/Minimal/IntQueue.c.
2150 various memory allocation files and into the common portable.h header
[all …]
Dsbom.spdx774 FileName: ./portable/oWatcom/16BitDOS/common/portcomn.c
775 SPDXID: SPDXRef-File-portable-oWatcom-16BitDOS-common-portcomn.c
935 FileName: ./portable/Common/mpu_wrappers_v2.c
936 SPDXID: SPDXRef-File-portable-Common-mpuwrappersv2.c
942 FileName: ./portable/Common/mpu_wrappers.c
943 SPDXID: SPDXRef-File-portable-Common-mpuwrappers.c
963 FileName: ./portable/BCC/16BitDOS/common/portcomn.c
964 SPDXID: SPDXRef-File-portable-BCC-16BitDOS-common-portcomn.c
/Kernel-v11.1.0/portable/GCC/RISC-V/chip_specific_extensions/RISCV_no_extensions/
Dfreertos_risc_v_chip_specific_extensions.h31 * common across all currently supported RISC-V chips (implementations of the
35 * is common to all currently supported RISC-V chips. There is only one
/Kernel-v11.1.0/portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/
Dfreertos_risc_v_chip_specific_extensions.h31 * common across all currently supported RISC-V chips (implementations of the
35 * is common to all currently supported RISC-V chips. There is only one
/Kernel-v11.1.0/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/
Dfreertos_risc_v_chip_specific_extensions.h31 * common across all currently supported RISC-V chips (implementations of the
35 * is common to all currently supported RISC-V chips. There is only one
/Kernel-v11.1.0/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/
Dfreertos_risc_v_chip_specific_extensions.h31 * common across all currently supported RISC-V chips (implementations of the
35 * is common to all currently supported RISC-V chips. There is only one
/Kernel-v11.1.0/.github/
Dpull_request_process.md51 …h GitHub labels added by Reviewers/Assignees. The following are the most common status indicators:…
96 … your PR can be made easier to review and merge. No document can replace common sense and good tas…
111 * It could be related to best practices (see contributing.md) not being followed. One common issue …
/Kernel-v11.1.0/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/
Dfreertos_risc_v_chip_specific_extensions.h31 * common across all currently supported RISC-V chips (implementations of the
35 * is common to all currently supported RISC-V chips. There is only one
/Kernel-v11.1.0/portable/
DCMakeLists.txt25 BCC/16BitDOS/common/portcomn.c
29 BCC/16BitDOS/common/portcomn.c
634 oWatcom/16BitDOS/common/portcomn.c
638 oWatcom/16BitDOS/common/portcomn.c
759 Common/mpu_wrappers.c
760 Common/mpu_wrappers_v2.c
771 ${CMAKE_CURRENT_LIST_DIR}/BCC/16BitDOS/common
775 ${CMAKE_CURRENT_LIST_DIR}/BCC/16BitDOS/common
1037 ${CMAKE_CURRENT_LIST_DIR}/oWatcom/16BitDOS/common
1040 ${CMAKE_CURRENT_LIST_DIR}/oWatcom/16BitDOS/common
Dreadme.txt2 components and are common to every port, and one or more files that are
/Kernel-v11.1.0/portable/IAR/78K0R/
Dportasm.s26122 COMMON INTVEC:CODE:ROOT(1) ; Set ISR location to the Interrupt vector table.
127 COMMON INTVEC:CODE:ROOT(1) ; Set ISR location to the Interrupt vector table.
/Kernel-v11.1.0/portable/CodeWarrior/HCS12/
Dport.c57 xPortStartScheduler() prototype is part of the common kernel code, and
161 of the common kernel code, and therefore cannot use the CODE_SEG pragma. in xPortStartScheduler()
/Kernel-v11.1.0/portable/ThirdParty/XCC/Xtensa/
Dreadme_xtensa.txt86 First install the FreeRTOS common package in a directory of your choosing.
93 | |-- common
101 | |-- Common
491 by pxCurrentTCB->pxTopOfStack. A special location common to both stack
DMakefile61 -I$(XT_SRCDIR) -I$(TSTROOT)$(S)common$(S)config_files -I$(BLDDIR)
/Kernel-v11.1.0/portable/GCC/ARM_CM55_NTZ/non_secure/
Dportmacro.h61 /* ARMv8-M common port configurations. */
/Kernel-v11.1.0/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/
Dportmacro.h61 /* ARMv8-M common port configurations. */

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