| /Kernel-v11.1.0/.github/ |
| D | uncrustify.cfg | 13 utf8_bom = ignore # ignore/add/remove/force
16 sp_arith = force # ignore/add/remove/force
17 sp_arith_additive = ignore # ignore/add/remove/force
18 sp_assign = force # ignore/add/remove/force
19 sp_cpp_lambda_assign = ignore # ignore/add/remove/force
20 sp_cpp_lambda_paren = ignore # ignore/add/remove/force
21 sp_assign_default = force # ignore/add/remove/force
22 sp_before_assign = force # ignore/add/remove/force
23 sp_after_assign = force # ignore/add/remove/force
24 sp_enum_paren = ignore # ignore/add/remove/force
[all …]
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| /Kernel-v11.1.0/ |
| D | README.md | 16 add in your own application source files. See the
38 Add the following into your project's main or a subdirectory's `CMakeLists.txt`:
49 In case you prefer to add it as a git submodule, do:
52 git submodule add https://github.com/FreeRTOS/FreeRTOS-Kernel.git <path of the submodule>
56 - Add a freertos_config library (typically an INTERFACE library) The following assumes the director…
73 In case you installed FreeRTOS-Kernel as a submodule, you will have to add it as a subdirectory:
94 - In case of cross compilation, you should also add the following to `freertos_config`:
176 and you believe this is a mistake, then add the word to
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| D | History.txt | 5 + Add ARMv7-R port with Memory Protection Unit (MPU) support.
6 + Add Memory Protection Unit (MPU) support to the Cortex-M0 port.
7 + Add stream batching buffer. A stream batching buffer differs from a stream
15 + Add the ability to change task notification index for stream buffers. We
17 + Add xStreamBufferResetFromISR and xMessageBufferResetFromISR APIs to reset
30 + Add a config option to the FreeRTOS SMP Kernel to set the default core
33 + Add configUSE_EVENT_GROUPS and configUSE_STREAM_BUFFERS configuration
37 + Add 64-bit support to the FreeRTOS Windows Simulator port. We thank @watsk
39 + Add support for 64-bit Microblaze processor to the MicroblazeV9 port. We
41 + Add support for MSP430 Embedded Application Binary Interface (EABI) to
[all …]
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| /Kernel-v11.1.0/portable/ThirdParty/XCC/Xtensa/ |
| D | xtensa_context.S | 460 add a3, a14, a15 /* a3 = save area for CP 0 */
468 add a3, a14, a15 /* a3 = save area for CP 1 */
476 add a3, a14, a15
484 add a3, a14, a15
492 add a3, a14, a15
500 add a3, a14, a15
508 add a3, a14, a15
516 add a3, a14, a15
566 add a3, a14, a15 /* a3 = save area for CP 0 */
574 add a3, a14, a15 /* a3 = save area for CP 1 */
[all …]
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| /Kernel-v11.1.0/portable/ThirdParty/GCC/Xtensa_ESP32/ |
| D | xtensa_context.S | 473 add a3, a3, a5
538 add a3, a14, a15 /* a3 = save area for CP 0 */
546 add a3, a14, a15 /* a3 = save area for CP 1 */
554 add a3, a14, a15
562 add a3, a14, a15
570 add a3, a14, a15
578 add a3, a14, a15
586 add a3, a14, a15
594 add a3, a14, a15
646 add a3, a14, a15 /* a3 = save area for CP 0 */
[all …]
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| D | port_common.c | 130 /*Add IDLE 0 to task wdt */ in main_task()
139 /*Add IDLE 1 to task wdt */ in main_task()
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| /Kernel-v11.1.0/portable/IAR/RISC-V/ |
| D | portASM.s | 42 * RISC-V chip that both includes a standard CLINT and does not add to the
45 * that do not include a standard CLINT or do add to the base set of RISC-V
55 * that include a standard CLINT and do not add to the base set of RISC-V
123 …add a4, t0, a2 /* Add the low word of ullNextTime to the timer increments for one tic…
125 add t2, a3, t1 /* Add overflow to high word of ullNextTime. */
137 add t4, t0, t2 /* Add ullNextTime to the timer increments for one tick. */
228 chip_specific_stack_frame: /* First add any chip specific registers to the stack frame…
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| /Kernel-v11.1.0/portable/GCC/RISC-V/ |
| D | portASM.S | 42 * RISC-V chip that both includes a standard CLINT and does not add to the
45 * that do not include a standard CLINT or do add to the base set of RISC-V
55 * that include a standard CLINT and do not add to the base set of RISC-V
114 …add a4, t0, a2 /* Add the low word of ullNextTime to the timer increments for one tic…
116 add t2, a3, t1 /* Add overflow to high word of ullNextTime. */
128 add t4, t0, t2 /* Add ullNextTime to the timer increments for one tick. */
220 chip_specific_stack_frame: /* First add any chip specific registers to the stack frame…
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| /Kernel-v11.1.0/portable/GCC/ARM_CRx_MPU/ |
| D | portASM.S | 91 ADD LR, LR, #60 /* R0-R14 - Total 155 register, each 4 byte wide. */
106 ADD R1, LR, #0x4 /* R1 now points to the xMPUSettings in TCB. */
120 ADD R5, R5, #1
150 ADD LR, LR, #60 /* R0-R14 - Total 155 register, each 4 byte wide. */
225 …ADD R11, R11, #portSYSTEM_CALL_INFO_OFFSET /* R11 now points to xSystemCallStackInfo in TCB. */
263 …ADD R11, R11, #portSYSTEM_CALL_INFO_OFFSET /* R11 now points to xSystemCallStackInfo in TCB. …
268 ADD R11, R11, 0x8
431 ADD R2, R1, #1 /* R2 = R1 + 1. */
486 ADD SP, SP, 0x4
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| /Kernel-v11.1.0/portable/oWatcom/16BitDOS/common/ |
| D | portasm.h | 50 debugger). The true stack pointer is then stored in the bp register. We add
67 "add bp, 0x0002"
76 …"add sp, 0x0002" /* Remove the extra bytes that exist in debug builds befor…
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| /Kernel-v11.1.0/.github/ISSUE_TEMPLATE/ |
| D | bug-report.md | 33 If applicable, add screenshots to help explain your problem.
36 Add any other context about the problem here.
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| /Kernel-v11.1.0/examples/coverity/ |
| D | CMakeLists.txt | 19 # Add the freertos_config for FreeRTOS-Kernel.
38 # Add the FreeRTOS-Kernel subdirectory.
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| /Kernel-v11.1.0/portable/ThirdParty/GCC/RP2040/ |
| D | README.md | 15 add the following in your `CMakeLists.txt`:
29 As an alternative to the `import` statement above, you can just add this directory directly via thw…
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| /Kernel-v11.1.0/portable/IAR/STR91x/ |
| D | portasm.s79 | 50 ADD LR, LR, #4 ; Add 4 to the LR to make the LR appear exactly
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| /Kernel-v11.1.0/portable/GCC/IA32_flat/ |
| D | portASM.S | 179 add $1, ulInterruptNesting
248 … add %ebx, %eax /* Add bit offset into register to get final vector number. */
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| /Kernel-v11.1.0/portable/IAR/STR75x/ |
| D | portasm.s79 | 51 ADD LR, LR, #4 ; Add 4 to the LR to make the LR appear exactly
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| /Kernel-v11.1.0/portable/IAR/AtmelSAM9XE/ |
| D | portasm.s79 | 49 ADD LR, LR, #4 ; Add 4 to the LR to make the LR appear exactly
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| /Kernel-v11.1.0/portable/IAR/V850ES/ |
| D | portasm.s85 | 195 ADD 0x0C,sp ; set SP to right position
214 add -0x0C,sp ; prepare stack to save necessary values
229 add 0x0C,sp ; set SP to right position
249 add -0x0C,sp ; prepare stack to save necessary values
265 add 0x0C,sp ; set SP to right position
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| D | portasm_Hx2.s85 | 195 ADD 0x0C,sp ; set SP to right position
214 add -0x0C,sp ; prepare stack to save necessary values
229 add 0x0C,sp ; set SP to right position
249 add -0x0C,sp ; prepare stack to save necessary values
265 add 0x0C,sp ; set SP to right position
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| D | portasm_Fx3.s85 | 204 ADD 0x0C,sp ; set SP to right position
223 add -0x0C,sp ; prepare stack to save necessary values
238 add 0x0C,sp ; set SP to right position
258 add -0x0C,sp ; prepare stack to save necessary values
274 add 0x0C,sp ; set SP to right position
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| /Kernel-v11.1.0/.github/workflows/ |
| D | auto-release.yml | 75 git add .
88 git add .
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| /Kernel-v11.1.0/portable/MPLAB/PIC32MZ/ |
| D | ISR_Support.h | 171 add s5, zero, sp
391 add sp, zero, s5
405 add sp, zero, s5
419 add sp, zero, s5
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| /Kernel-v11.1.0/portable/IAR/STR71x/ |
| D | portasm.s79 | 52 ADD LR, LR, #4 ; Add 4 to the LR to make the LR appear exactly
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| /Kernel-v11.1.0/portable/IAR/LPC2000/ |
| D | portasm.s79 | 53 ADD LR, LR, #4 ; Add 4 to the LR to make the LR appear exactly
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| /Kernel-v11.1.0/portable/IAR/AtmelSAM7S64/ |
| D | portasm.s79 | 52 ADD LR, LR, #4 ; Add 4 to the LR to make the LR appear exactly
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