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/Kernel-v11.1.0/portable/ThirdParty/GCC/Xtensa_ESP32/
Dxtensa_context.S64 #if (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0))
85 This function preserves A12 & A13 in order to provide the caller with 2 scratch
87 2 regs to provide is governed by xthal_window_spill_nw and xthal_save_extra_nw,
158 #if (ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4, 2, 0))
191 #endif /* (ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4, 2, 0)) */
193 #if (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0))
209 call0 xthal_save_extra_nw /* destroys a0,2,3 */
212 #if (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0))
259 #endif /* ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0) */
315 call0 xthal_restore_extra_nw /* destroys a0,2,3,4,5 */
[all …]
Dxtensa_vector_defaults.S9 #if (ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4, 2, 0))
13 #endif /* ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4, 2, 0) */
73 When flash is DOUT/DIO read, N = 2.
122 #if XCHAL_NUM_INTLEVELS >=2 && XCHAL_EXCM_LEVEL <2 && XCHAL_DEBUGLEVEL !=2
135 rfi 2
137 #endif /* Level 2 */
Dxtensa_vectors.S87 2. The -mlongcalls compiler option causes 'call0 dest' to be expanded to
105 #if (ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4, 2, 0))
109 #endif /* ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4, 2, 0) */
162 #elif (portNUM_PROCESSORS == 2)
163 /* Optimized 2-core code. */
244 #if (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0))
250 #endif /* ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0) */
256 movi a4, 0xC0000000 /* constant with top 2 bits set (call size) */
257 or a0, a0, a4 /* set top 2 bits */
269 l32i a4, a4, \level << 2
[all …]
Dxtensa_loadstore_handler.S85 j 2f
91 2:
115 j 2f
119 bbci a2, 15, 2f // l16ui
125 2:
179 j 2f
183 2:
279 j 2f
285 2:
310 addi a3, a3, 2
[all …]
/Kernel-v11.1.0/portable/ThirdParty/XCC/Xtensa/
Dxtensa_context.S78 This function preserves A12 & A13 in order to provide the caller with 2 scratch
80 2 regs to provide is governed by xthal_window_spill_nw and xthal_save_extra_nw,
196 call0 xthal_save_extra_nw /* destroys a0,2,3,4,5 */
251 call0 xthal_restore_extra_nw /* destroys a0,2,3,4,5 */
355 addi a3, a2, XCHAL_CP_MAX << 2 /* a3 = top+1 of owner array */
399 addi a4, a3, XCHAL_CP_MAX << 2 /* a4 = top+1 of owner array */
405 bne a2, a7, 2f /* if (coproc_sa_base == owner) */
407 2: addi a3, a3, 1<<2 /* a3 = next entry in owner array */
458 bbci.l a2, 0, 2f /* CP 0 not enabled */
462 2:
[all …]
/Kernel-v11.1.0/portable/GCC/RX600/
Dreadme.txt8 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
9 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
10 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
11 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
49 *2: If the application writer wants to use their own tick interrupt configuration when tickless idle
/Kernel-v11.1.0/portable/GCC/RX600v2/
Dreadme.txt8 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
9 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
10 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
11 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
49 *2: If the application writer wants to use their own tick interrupt configuration when tickless idle
/Kernel-v11.1.0/portable/IAR/RX600/
Dreadme.txt8 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
9 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
10 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
11 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
49 *2: If the application writer wants to use their own tick interrupt configuration when tickless idle
/Kernel-v11.1.0/portable/IAR/RX700v3_DPFPU/
Dreadme.txt8 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
9 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
10 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
11 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
49 *2: If the application writer wants to use their own tick interrupt configuration when tickless idle
Dport.c72 #define portDPFPU_DATA_REGISTER_WORDS ( 16 * 2 )
192 #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 ) in pxPortInitialiseStack()
198 pxTopOfStack -= 2; in pxPortInitialiseStack()
200 pxTopOfStack -= 2; in pxPortInitialiseStack()
202 pxTopOfStack -= 2; in pxPortInitialiseStack()
204 pxTopOfStack -= 2; in pxPortInitialiseStack()
206 pxTopOfStack -= 2; in pxPortInitialiseStack()
208 pxTopOfStack -= 2; in pxPortInitialiseStack()
210 pxTopOfStack -= 2; in pxPortInitialiseStack()
212 pxTopOfStack -= 2; in pxPortInitialiseStack()
[all …]
/Kernel-v11.1.0/portable/IAR/RX100/
Dreadme.txt8 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
9 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
10 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
11 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
49 *2: If the application writer wants to use their own tick interrupt configuration when tickless idle
/Kernel-v11.1.0/portable/Renesas/RX100/
Dreadme.txt8 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
9 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
10 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
11 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
49 *2: If the application writer wants to use their own tick interrupt configuration when tickless idle
/Kernel-v11.1.0/portable/GCC/RX700v3_DPFPU/
Dreadme.txt8 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
9 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
10 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
11 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
49 *2: If the application writer wants to use their own tick interrupt configuration when tickless idle
Dport.c72 #define portDPFPU_DATA_REGISTER_WORDS ( 16 * 2 )
218 #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 ) in pxPortInitialiseStack()
224 pxTopOfStack -= 2; in pxPortInitialiseStack()
226 pxTopOfStack -= 2; in pxPortInitialiseStack()
228 pxTopOfStack -= 2; in pxPortInitialiseStack()
230 pxTopOfStack -= 2; in pxPortInitialiseStack()
232 pxTopOfStack -= 2; in pxPortInitialiseStack()
234 pxTopOfStack -= 2; in pxPortInitialiseStack()
236 pxTopOfStack -= 2; in pxPortInitialiseStack()
238 pxTopOfStack -= 2; in pxPortInitialiseStack()
[all …]
/Kernel-v11.1.0/portable/IAR/RXv2/
Dreadme.txt8 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
9 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
10 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
11 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
49 *2: If the application writer wants to use their own tick interrupt configuration when tickless idle
/Kernel-v11.1.0/portable/Renesas/RX700v3_DPFPU/
Dreadme.txt8 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
9 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
10 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
11 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
49 *2: If the application writer wants to use their own tick interrupt configuration when tickless idle
Dport.c72 #define portDPFPU_DATA_REGISTER_WORDS ( 16 * 2 )
208 #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 ) in pxPortInitialiseStack()
214 pxTopOfStack -= 2; in pxPortInitialiseStack()
216 pxTopOfStack -= 2; in pxPortInitialiseStack()
218 pxTopOfStack -= 2; in pxPortInitialiseStack()
220 pxTopOfStack -= 2; in pxPortInitialiseStack()
222 pxTopOfStack -= 2; in pxPortInitialiseStack()
224 pxTopOfStack -= 2; in pxPortInitialiseStack()
226 pxTopOfStack -= 2; in pxPortInitialiseStack()
228 pxTopOfStack -= 2; in pxPortInitialiseStack()
[all …]
/Kernel-v11.1.0/portable/GCC/RX100/
Dreadme.txt8 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
9 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
10 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
11 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
49 *2: If the application writer wants to use their own tick interrupt configuration when tickless idle
/Kernel-v11.1.0/portable/Renesas/RX200/
Dreadme.txt8 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
9 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
10 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
11 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
49 *2: If the application writer wants to use their own tick interrupt configuration when tickless idle
/Kernel-v11.1.0/portable/Renesas/RX600/
Dreadme.txt8 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
9 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
10 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
11 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
49 *2: If the application writer wants to use their own tick interrupt configuration when tickless idle
/Kernel-v11.1.0/portable/Renesas/RX600v2/
Dreadme.txt8 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
9 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
10 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
11 … RXv1 No --- Renesas/RX100 (*1,*2) GCC/RX100 (*1,*2) IAR/RX100 (*1,*2)
49 *2: If the application writer wants to use their own tick interrupt configuration when tickless idle
/Kernel-v11.1.0/portable/GCC/HCS12/
Dportmacro.h208 movw _.frame, 2,-sp \n\
209 movw _.tmp, 2,-sp \n\
210 movw _.z, 2,-sp \n\
211 movw _.xy, 2,-sp \n\
212 ;movw _.d2, 2,-sp \n\
213 ;movw _.d1, 2,-sp \n\
220 movw 2,sp+, _.xy \n\
221 movw 2,sp+, _.z \n\
222 movw 2,sp+, _.tmp \n\
223 movw 2,sp+, _.frame \n\
[all …]
/Kernel-v11.1.0/.github/
Dpull_request_process.md26 2. All the GitHub Actions pass and the PR is ready to be reviewed.
27 2. Triage
29 2. The assignee assigns a reviewer from the FreeRTOS Team to the PR.
32 …2. If the contributor and the reviewer conclude, after discussion, that the PR will not be merged,…
37 2. The PR contributor addresses the feedback and makes changes to the PR, if needed.
43 1. At least 2 reviews.
44 2. One review from the CODEOWNER of the given repository.
53 …ot go through all the above stages, however every PR is required to get approvals from 2 reviewers.
67 * Concept ACK/NACK: 1-2 weeks
68 * Code Review: 1-2 weeks
[all …]
/Kernel-v11.1.0/portable/oWatcom/16BitDOS/common/
Dportasm.h51 2 to the stack pointer to remove the extra bytes before we restore our context. */
64 … "mov ss, es:[ bx + 2 ]" \
74 "mov ss, es:[ bx + 2 ]" \
94 … "mov ss, es:[ bx + 2 ]" \
101 "mov ss, es:[ bx + 2 ]" \
/Kernel-v11.1.0/portable/GCC/ARM7_AT91SAM7S/
Dioat91sam7x256.h64 AT91_REG Reserved0[ 2 ]; /* */
228 AT91_REG Reserved0[ 2 ]; /* */
316 #define AT91C_US_RSTRX ( ( unsigned int ) 0x1 << 2 ) /* (DBGU) Reset Receiver */
429 … ( ( unsigned int ) 0x1 << 28 ) /* (CKGR) Divider output is PLL clock output divided by 2 */
476 #define AT91C_PMC_PRES ( ( unsigned int ) 0x7 << 2 ) /* (PMC) Programmable Clock Pre…
477 #define AT91C_PMC_PRES_CLK ( ( unsigned int ) 0x0 << 2 ) /* (PMC) Selected clock */
478 … AT91C_PMC_PRES_CLK_2 ( ( unsigned int ) 0x1 << 2 ) /* (PMC) Selected clock divided by 2 */
479 #define AT91C_PMC_PRES_CLK_4 ( ( unsigned int ) 0x2 << 2 ) /* (PMC) Selected clock divided…
480 #define AT91C_PMC_PRES_CLK_8 ( ( unsigned int ) 0x3 << 2 ) /* (PMC) Selected clock divided…
481 #define AT91C_PMC_PRES_CLK_16 ( ( unsigned int ) 0x4 << 2 ) /* (PMC) Selected clock divided…
[all …]

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