Home
last modified time | relevance | path

Searched +full:- +full:e (Results 1 – 25 of 128) sorted by relevance

123456

/Kernel-v11.1.0/.github/workflows/
Dcoverity_scan.yml10 bashPass: \033[32;1mPASSED -
11 bashInfo: \033[33;1mINFO -
12 bashFail: \033[31;1mFAILED -
16 Coverity-Scan:
17 if: ( github.repository == 'FreeRTOS/FreeRTOS-Kernel' )
19 runs-on: ubuntu-latest
21 - name: Checkout the Repository
24 - env:
29 echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
31 sudo apt-get -y update
[all …]
Dkernel-checks.yml1 name: Kernel-Checker
6 kernel-checker:
8 runs-on: ubuntu-20.04
11 - name: Tool Setup
12 uses: actions/setup-python@v3
17 - name: Checkout FreeRTOS Tools
21 sparse-checkout: '.github'
26 - name: Checkout Pull Request
32 - name: Collecting changed files
33 uses: lots0logs/gh-action-get-changed-files@2.2.2
[all …]
Dkernel-demos.yml1 name: FreeRTOS-Kernel Demos
6 bashPass: \033[32;1mPASSED -
7 bashInfo: \033[33;1mINFO -
8 bashFail: \033[31;1mFAILED -
12 WIN32-MSVC:
14 runs-on: windows-latest
16 - name: Checkout the FreeRTOS/FreeRTOS Repository
22 fetch-depth: 1
25 - name: Checkout Pull Request
30 - name: Add msbuild to PATH
[all …]
/Kernel-v11.1.0/.github/ISSUE_TEMPLATE/
Dbug-report.md1 ---
10 ---
16 - Development board: [e.g. HiFive11 RevB]
17 - Instruction Set Architecture: [e.g. RV32IMAC]
18 - IDE and version: [e.g. Freedom Studio 4.12.0.2019-08-2]
19 - Toolchain and version: [e.g. riscv64-unknown-elf-gcc-8.3.0-2019.08.0]
22 - Host OS: [e.g. MacOS]
23 - Version: [e.g. Mojave 10.14.6]
26 - Use project ... and configure with ...
27 - Run on ... and could observe ...
[all …]
/Kernel-v11.1.0/portable/IAR/ARM_CM35P/non_secure/
Dportasm.s5 * SPDX-License-Identifier: MIT
29 contains code not understood by the assembler - for example the 'extern' keyword.
64 /*-----------------------------------------------------------*/
66 /*---------------- Unprivileged Functions -------------------*/
68 /*-----------------------------------------------------------*/
72 /*-----------------------------------------------------------*/
81 /*-----------------------------------------------------------*/
88 /*-----------------------------------------------------------*/
93 /*-----------------------------------------------------------*/
95 /*----------------- Privileged Functions --------------------*/
[all …]
/Kernel-v11.1.0/portable/IAR/ARM_CM85/non_secure/
Dportasm.s5 * SPDX-License-Identifier: MIT
29 contains code not understood by the assembler - for example the 'extern' keyword.
64 /*-----------------------------------------------------------*/
66 /*---------------- Unprivileged Functions -------------------*/
68 /*-----------------------------------------------------------*/
72 /*-----------------------------------------------------------*/
81 /*-----------------------------------------------------------*/
88 /*-----------------------------------------------------------*/
93 /*-----------------------------------------------------------*/
95 /*----------------- Privileged Functions --------------------*/
[all …]
/Kernel-v11.1.0/portable/IAR/ARM_CM33/non_secure/
Dportasm.s5 * SPDX-License-Identifier: MIT
29 contains code not understood by the assembler - for example the 'extern' keyword.
64 /*-----------------------------------------------------------*/
66 /*---------------- Unprivileged Functions -------------------*/
68 /*-----------------------------------------------------------*/
72 /*-----------------------------------------------------------*/
81 /*-----------------------------------------------------------*/
88 /*-----------------------------------------------------------*/
93 /*-----------------------------------------------------------*/
95 /*----------------- Privileged Functions --------------------*/
[all …]
/Kernel-v11.1.0/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/
Dportasm.s5 * SPDX-License-Identifier: MIT
29 contains code not understood by the assembler - for example the 'extern' keyword.
64 /*-----------------------------------------------------------*/
66 /*---------------- Unprivileged Functions -------------------*/
68 /*-----------------------------------------------------------*/
72 /*-----------------------------------------------------------*/
81 /*-----------------------------------------------------------*/
88 /*-----------------------------------------------------------*/
93 /*-----------------------------------------------------------*/
95 /*----------------- Privileged Functions --------------------*/
[all …]
/Kernel-v11.1.0/portable/IAR/ARM_CM55/non_secure/
Dportasm.s5 * SPDX-License-Identifier: MIT
29 contains code not understood by the assembler - for example the 'extern' keyword.
64 /*-----------------------------------------------------------*/
66 /*---------------- Unprivileged Functions -------------------*/
68 /*-----------------------------------------------------------*/
72 /*-----------------------------------------------------------*/
81 /*-----------------------------------------------------------*/
88 /*-----------------------------------------------------------*/
93 /*-----------------------------------------------------------*/
95 /*----------------- Privileged Functions --------------------*/
[all …]
/Kernel-v11.1.0/portable/IAR/ARM_CM23/non_secure/
Dportasm.s5 * SPDX-License-Identifier: MIT
30 contains code not understood by the assembler - for example the 'extern' keyword.
68 …#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be…
70 /*-----------------------------------------------------------*/
72 /*---------------- Unprivileged Functions -------------------*/
74 /*-----------------------------------------------------------*/
78 /*-----------------------------------------------------------*/
90 /*-----------------------------------------------------------*/
98 /*-----------------------------------------------------------*/
103 /*-----------------------------------------------------------*/
[all …]
/Kernel-v11.1.0/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/
Dportasm.s5 * SPDX-License-Identifier: MIT
30 contains code not understood by the assembler - for example the 'extern' keyword.
68 …#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be…
70 /*-----------------------------------------------------------*/
72 /*---------------- Unprivileged Functions -------------------*/
74 /*-----------------------------------------------------------*/
78 /*-----------------------------------------------------------*/
90 /*-----------------------------------------------------------*/
98 /*-----------------------------------------------------------*/
103 /*-----------------------------------------------------------*/
[all …]
/Kernel-v11.1.0/portable/GCC/ARM_CM23/non_secure/
Dportasm.c5 * SPDX-License-Identifier: MIT
47 …#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be…
59 …urrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). … in vRestoreContextOfFirstTask()
66 …" bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2.… in vRestoreContextOfFirstTask()
70 " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ in vRestoreContextOfFirstTask()
79 …" ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers fro… in vRestoreContextOfFirstTask()
81 …" stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ in vRestoreContextOfFirstTask()
84 …" ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers fr… in vRestoreContextOfFirstTask()
86 …" stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. … in vRestoreContextOfFirstTask()
89 …" ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers fro… in vRestoreContextOfFirstTask()
[all …]
/Kernel-v11.1.0/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/
Dportasm.c5 * SPDX-License-Identifier: MIT
47 …#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be…
59 …urrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). … in vRestoreContextOfFirstTask()
66 …" bics r2, r3 \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2.… in vRestoreContextOfFirstTask()
70 " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ in vRestoreContextOfFirstTask()
79 …" ldmia r0!, {r4-r5} \n" /* Read first set of RBAR/RLAR registers fro… in vRestoreContextOfFirstTask()
81 …" stmia r2!, {r4-r5} \n" /* Write first set of RBAR/RLAR registers. */ in vRestoreContextOfFirstTask()
84 …" ldmia r0!, {r4-r5} \n" /* Read second set of RBAR/RLAR registers fr… in vRestoreContextOfFirstTask()
86 …" stmia r2!, {r4-r5} \n" /* Write second set of RBAR/RLAR registers. … in vRestoreContextOfFirstTask()
89 …" ldmia r0!, {r4-r5} \n" /* Read third set of RBAR/RLAR registers fro… in vRestoreContextOfFirstTask()
[all …]
/Kernel-v11.1.0/portable/GCC/ARM_CM35P/non_secure/
Dportasm.c5 * SPDX-License-Identifier: MIT
55 …urrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). … in vRestoreContextOfFirstTask()
61 …" bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. … in vRestoreContextOfFirstTask()
65 " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ in vRestoreContextOfFirstTask()
75 …" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TC… in vRestoreContextOfFirstTask()
76 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
81 …" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TC… in vRestoreContextOfFirstTask()
82 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
85 …" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TC… in vRestoreContextOfFirstTask()
86 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
[all …]
/Kernel-v11.1.0/portable/GCC/ARM_CM85/non_secure/
Dportasm.c5 * SPDX-License-Identifier: MIT
55 …urrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). … in vRestoreContextOfFirstTask()
61 …" bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. … in vRestoreContextOfFirstTask()
65 " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ in vRestoreContextOfFirstTask()
75 …" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TC… in vRestoreContextOfFirstTask()
76 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
81 …" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TC… in vRestoreContextOfFirstTask()
82 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
85 …" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TC… in vRestoreContextOfFirstTask()
86 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
[all …]
/Kernel-v11.1.0/portable/GCC/ARM_CM55/non_secure/
Dportasm.c5 * SPDX-License-Identifier: MIT
55 …urrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). … in vRestoreContextOfFirstTask()
61 …" bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. … in vRestoreContextOfFirstTask()
65 " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ in vRestoreContextOfFirstTask()
75 …" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TC… in vRestoreContextOfFirstTask()
76 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
81 …" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TC… in vRestoreContextOfFirstTask()
82 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
85 …" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TC… in vRestoreContextOfFirstTask()
86 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
[all …]
/Kernel-v11.1.0/portable/GCC/ARM_CM33/non_secure/
Dportasm.c5 * SPDX-License-Identifier: MIT
55 …urrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). … in vRestoreContextOfFirstTask()
61 …" bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. … in vRestoreContextOfFirstTask()
65 " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ in vRestoreContextOfFirstTask()
75 …" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TC… in vRestoreContextOfFirstTask()
76 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
81 …" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TC… in vRestoreContextOfFirstTask()
82 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
85 …" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TC… in vRestoreContextOfFirstTask()
86 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
[all …]
/Kernel-v11.1.0/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/
Dportasm.c5 * SPDX-License-Identifier: MIT
55 …urrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). … in vRestoreContextOfFirstTask()
61 …" bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. … in vRestoreContextOfFirstTask()
65 " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ in vRestoreContextOfFirstTask()
75 …" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TC… in vRestoreContextOfFirstTask()
76 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
81 …" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TC… in vRestoreContextOfFirstTask()
82 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
85 …" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TC… in vRestoreContextOfFirstTask()
86 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
[all …]
/Kernel-v11.1.0/portable/IAR/ARM_CM35P_NTZ/non_secure/
Dportasm.s5 * SPDX-License-Identifier: MIT
29 contains code not understood by the assembler - for example the 'extern' keyword.
59 /*-----------------------------------------------------------*/
61 /*---------------- Unprivileged Functions -------------------*/
63 /*-----------------------------------------------------------*/
67 /*-----------------------------------------------------------*/
76 /*-----------------------------------------------------------*/
83 /*-----------------------------------------------------------*/
85 /*----------------- Privileged Functions --------------------*/
87 /*-----------------------------------------------------------*/
[all …]
/Kernel-v11.1.0/portable/IAR/ARM_CM33_NTZ/non_secure/
Dportasm.s5 * SPDX-License-Identifier: MIT
29 contains code not understood by the assembler - for example the 'extern' keyword.
59 /*-----------------------------------------------------------*/
61 /*---------------- Unprivileged Functions -------------------*/
63 /*-----------------------------------------------------------*/
67 /*-----------------------------------------------------------*/
76 /*-----------------------------------------------------------*/
83 /*-----------------------------------------------------------*/
85 /*----------------- Privileged Functions --------------------*/
87 /*-----------------------------------------------------------*/
[all …]
/Kernel-v11.1.0/portable/IAR/ARM_CM55_NTZ/non_secure/
Dportasm.s5 * SPDX-License-Identifier: MIT
29 contains code not understood by the assembler - for example the 'extern' keyword.
59 /*-----------------------------------------------------------*/
61 /*---------------- Unprivileged Functions -------------------*/
63 /*-----------------------------------------------------------*/
67 /*-----------------------------------------------------------*/
76 /*-----------------------------------------------------------*/
83 /*-----------------------------------------------------------*/
85 /*----------------- Privileged Functions --------------------*/
87 /*-----------------------------------------------------------*/
[all …]
/Kernel-v11.1.0/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/
Dportasm.s5 * SPDX-License-Identifier: MIT
29 contains code not understood by the assembler - for example the 'extern' keyword.
59 /*-----------------------------------------------------------*/
61 /*---------------- Unprivileged Functions -------------------*/
63 /*-----------------------------------------------------------*/
67 /*-----------------------------------------------------------*/
76 /*-----------------------------------------------------------*/
83 /*-----------------------------------------------------------*/
85 /*----------------- Privileged Functions --------------------*/
87 /*-----------------------------------------------------------*/
[all …]
/Kernel-v11.1.0/portable/IAR/ARM_CM85_NTZ/non_secure/
Dportasm.s5 * SPDX-License-Identifier: MIT
29 contains code not understood by the assembler - for example the 'extern' keyword.
59 /*-----------------------------------------------------------*/
61 /*---------------- Unprivileged Functions -------------------*/
63 /*-----------------------------------------------------------*/
67 /*-----------------------------------------------------------*/
76 /*-----------------------------------------------------------*/
83 /*-----------------------------------------------------------*/
85 /*----------------- Privileged Functions --------------------*/
87 /*-----------------------------------------------------------*/
[all …]
/Kernel-v11.1.0/portable/GCC/ARM_CM55_NTZ/non_secure/
Dportasm.c5 * SPDX-License-Identifier: MIT
55 …urrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). … in vRestoreContextOfFirstTask()
61 …" bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. … in vRestoreContextOfFirstTask()
65 " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ in vRestoreContextOfFirstTask()
75 …" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from T… in vRestoreContextOfFirstTask()
76 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
81 …" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from T… in vRestoreContextOfFirstTask()
82 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
85 …" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from T… in vRestoreContextOfFirstTask()
86 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
[all …]
/Kernel-v11.1.0/portable/GCC/ARM_CM85_NTZ/non_secure/
Dportasm.c5 * SPDX-License-Identifier: MIT
55 …urrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). … in vRestoreContextOfFirstTask()
61 …" bic r2, #1 \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. … in vRestoreContextOfFirstTask()
65 " ldr r1, [r0] \n" /* r1 = *r0 i.e. r1 = MAIR0. */ in vRestoreContextOfFirstTask()
75 …" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from T… in vRestoreContextOfFirstTask()
76 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
81 …" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from T… in vRestoreContextOfFirstTask()
82 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
85 …" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from T… in vRestoreContextOfFirstTask()
86 …" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using … in vRestoreContextOfFirstTask()
[all …]

123456