| /Kernel-v11.1.0/portable/ThirdParty/XCC/Xtensa/ |
| D | port.c | 3 * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
6 * SPDX-License-Identifier: MIT
46 /*-----------------------------------------------------------*/
56 /*-----------------------------------------------------------*/
79 sp = ( StackType_t * ) ( ( ( UBaseType_t ) pxTopOfStack - XT_CP_SIZE - XT_STK_FRMSZ ) & ~0xf ); in pxPortInitialiseStack()
90 frame->pc = ( UBaseType_t ) pxCode; /* task entrypoint */ in pxPortInitialiseStack()
91 frame->a0 = 0; /* to terminate GDB backtrace */ in pxPortInitialiseStack()
92 frame->a1 = ( UBaseType_t ) sp + XT_STK_FRMSZ; /* physical top of stack frame */ in pxPortInitialiseStack()
93 frame->exit = ( UBaseType_t ) _xt_user_exit; /* user exception exit dispatcher */ in pxPortInitialiseStack()
98 frame->a2 = ( UBaseType_t ) pvParameters; in pxPortInitialiseStack()
[all …]
|
| D | xtensa_overlay_os_hook.c | 3 * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
6 * SPDX-License-Identifier: MIT
31 * xtensa_overlay_os_hook.c -- Overlay manager OS hooks for FreeRTOS.
45 /* This function should be overridden to provide OS specific init such
|
| D | portclib.c | 3 * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
6 * SPDX-License-Identifier: MIT
43 //-----------------------------------------------------------------------------
45 //-----------------------------------------------------------------------------
49 //-----------------------------------------------------------------------------
50 // Init lock.
51 //-----------------------------------------------------------------------------
58 //-----------------------------------------------------------------------------
60 //-----------------------------------------------------------------------------
69 //-----------------------------------------------------------------------------
[all …]
|
| D | portasm.S | 3 * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
6 * SPDX-License-Identifier: MIT
96 /* Save a12-13 in the stack frame as required by _xt_context_save. */
103 /* Save the rest of the interrupted context (preserves A12-13). */
123 s32i a1, a2, TOPOFSTACK_OFFS /* pxCurrentTCB->pxTopOfStack = SP */
157 addi a2, a2, -1 /* decrement nesting count */
164 l32i a1, a2, TOPOFSTACK_OFFS /* SP = pxCurrentTCB->pxTopOfStack */
174 Call0 ABI callee-saved regs a12-15 need to be saved before possible preemption.
175 However a12-13 were already saved by _frxt_int_enter().
186 call0 _frxt_dispatch /* tail-call dispatcher */
[all …]
|
| /Kernel-v11.1.0/portable/GCC/RL78/ |
| D | port.c | 5 * SPDX-License-Identifier: MIT
39 * ||||||||-------------- Fill byte
40 * |||||||--------------- Carry Flag cleared
41 * |||||----------------- In-service priority Flags set to low level
42 * ||||------------------ Register bank Select 0 Flag cleared
43 * |||------------------- Auxiliary Carry Flag cleared
44 * ||-------------------- Register bank Select 1 Flag cleared
45 * |--------------------- Zero Flag set
46 * ---------------------- Global Interrupt Flag set (enabled)
52 * section is exited the count is decremented - with interrupts only being
[all …]
|
| /Kernel-v11.1.0/.github/workflows/ |
| D | kernel-demos.yml | 1 name: FreeRTOS-Kernel Demos
6 bashPass: \033[32;1mPASSED -
7 bashInfo: \033[33;1mINFO -
8 bashFail: \033[31;1mFAILED -
12 WIN32-MSVC:
14 runs-on: windows-latest
16 - name: Checkout the FreeRTOS/FreeRTOS Repository
22 fetch-depth: 1
25 - name: Checkout Pull Request
30 - name: Add msbuild to PATH
[all …]
|
| /Kernel-v11.1.0/portable/ThirdParty/GCC/Xtensa_ESP32/ |
| D | xtensa_overlay_os_hook.c | 2 * SPDX-FileCopyrightText: 2015-2019 Cadence Design Systems, Inc.
4 * SPDX-License-Identifier: MIT
6 * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD
10 * Copyright (c) 2015-2019 Cadence Design Systems, Inc.
32 /* xtensa_overlay_os_hook.c -- Overlay manager OS hooks for FreeRTOS. */
45 /* This function should be overridden to provide OS specific init such
|
| D | port_systick.c | 2 * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
4 * SPDX-License-Identifier: Apache-2.0
46 /* Init the tick divisor value */ in vPortSetupTimer()
55 …_Static_assert( SOC_CPU_CORES_NUM <= SOC_SYSTIMER_ALARM_NUM - 1, "the number of cores must match t…
142 systimer_ll_clear_alarm_int( systimer_hal->dev, alarm_id ); in SysTickIsrHandler()
144 …R_LL_COUNTER_OS_TICK ) / systimer_ll_get_alarm_period( systimer_hal->dev, alarm_id ) - s_handled_s… in SysTickIsrHandler()
161 } while( --diff ); in SysTickIsrHandler()
163 } while( systimer_ll_is_alarm_int_fired( systimer_hal->dev, alarm_id ) ); in SysTickIsrHandler()
176 * - _frxt_timer_int for xtensa with CONFIG_FREERTOS_SYSTICK_USES_CCOUNT
177 * - SysTickIsrHandler for xtensa with CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER
[all …]
|
| D | port.c | 2 * SPDX-FileCopyrightText: 2020 Amazon.com, Inc. or its affiliates
3 * SPDX-FileCopyrightText: 2015-2019 Cadence Design Systems, Inc.
5 * SPDX-License-Identifier: MIT
7 * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD
39 * Copyright (c) 2015-2019 Cadence Design Systems, Inc.
101 /*-----------------------------------------------------------*/
106 /*-----------------------------------------------------------*/
127 /* *INDENT-OFF* */
138 /* *INDENT-ON* */ in pxPortInitialiseStack()
153 … uint32_t thread_local_sz = ( uint8_t * ) &_thread_local_end - ( uint8_t * ) &_thread_local_start; in pxPortInitialiseStack()
[all …]
|
| /Kernel-v11.1.0/portable/ThirdParty/CDK/T-HEAD_CK802/ |
| D | port.c | 2 * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
4 * SPDX-License-Identifier: MIT
47 … *( --stk ) = ( uint32_t ) pxCode; /* Entry Point */ in pxPortInitialiseStack()
48 … *( --stk ) = ( uint32_t ) 0xE0000140L; /* PSR */ in pxPortInitialiseStack()
49 … *( --stk ) = ( uint32_t ) 0xFFFFFFFEL; /* R15 (LR) (init value will cause fault if ever used) */ in pxPortInitialiseStack()
50 … *( --stk ) = ( uint32_t ) 0x13131313L; /* R13 */ in pxPortInitialiseStack()
51 … *( --stk ) = ( uint32_t ) 0x12121212L; /* R12 */ in pxPortInitialiseStack()
52 … *( --stk ) = ( uint32_t ) 0x11111111L; /* R11 */ in pxPortInitialiseStack()
53 … *( --stk ) = ( uint32_t ) 0x10101010L; /* R10 */ in pxPortInitialiseStack()
54 … *( --stk ) = ( uint32_t ) 0x09090909L; /* R9 */ in pxPortInitialiseStack()
[all …]
|
| /Kernel-v11.1.0/portable/IAR/ARM_CM33/secure/ |
| D | secure_init.c | 5 * SPDX-License-Identifier: MIT
32 /* Secure init includes. */
56 #define secureinitNSACR ( ( volatile uint32_t * ) 0xe000ed8c ) /* Non-secure A…
61 /*-----------------------------------------------------------*/
79 /*-----------------------------------------------------------*/
92 /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is in SecureInit_EnableNSFPUAccess()
96 /* LSPENS = 0 ==> LSPEN is writable from non-secure state. This ensures in SecureInit_EnableNSFPUAccess()
101 * registers (S16-S31) are also pushed to stack on exception entry and in SecureInit_EnableNSFPUAccess()
106 /*-----------------------------------------------------------*/
|
| /Kernel-v11.1.0/portable/IAR/ARM_CM85/secure/ |
| D | secure_init.c | 5 * SPDX-License-Identifier: MIT
32 /* Secure init includes. */
56 #define secureinitNSACR ( ( volatile uint32_t * ) 0xe000ed8c ) /* Non-secure A…
61 /*-----------------------------------------------------------*/
79 /*-----------------------------------------------------------*/
92 /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is in SecureInit_EnableNSFPUAccess()
96 /* LSPENS = 0 ==> LSPEN is writable from non-secure state. This ensures in SecureInit_EnableNSFPUAccess()
101 * registers (S16-S31) are also pushed to stack on exception entry and in SecureInit_EnableNSFPUAccess()
106 /*-----------------------------------------------------------*/
|
| /Kernel-v11.1.0/portable/GCC/ARM_CM35P/secure/ |
| D | secure_init.c | 5 * SPDX-License-Identifier: MIT
32 /* Secure init includes. */
56 #define secureinitNSACR ( ( volatile uint32_t * ) 0xe000ed8c ) /* Non-secure A…
61 /*-----------------------------------------------------------*/
79 /*-----------------------------------------------------------*/
92 /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is in SecureInit_EnableNSFPUAccess()
96 /* LSPENS = 0 ==> LSPEN is writable from non-secure state. This ensures in SecureInit_EnableNSFPUAccess()
101 * registers (S16-S31) are also pushed to stack on exception entry and in SecureInit_EnableNSFPUAccess()
106 /*-----------------------------------------------------------*/
|
| /Kernel-v11.1.0/portable/IAR/ARM_CM23/secure/ |
| D | secure_init.c | 5 * SPDX-License-Identifier: MIT
32 /* Secure init includes. */
56 #define secureinitNSACR ( ( volatile uint32_t * ) 0xe000ed8c ) /* Non-secure A…
61 /*-----------------------------------------------------------*/
79 /*-----------------------------------------------------------*/
92 /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is in SecureInit_EnableNSFPUAccess()
96 /* LSPENS = 0 ==> LSPEN is writable from non-secure state. This ensures in SecureInit_EnableNSFPUAccess()
101 * registers (S16-S31) are also pushed to stack on exception entry and in SecureInit_EnableNSFPUAccess()
106 /*-----------------------------------------------------------*/
|
| /Kernel-v11.1.0/portable/GCC/ARM_CM55/secure/ |
| D | secure_init.c | 5 * SPDX-License-Identifier: MIT
32 /* Secure init includes. */
56 #define secureinitNSACR ( ( volatile uint32_t * ) 0xe000ed8c ) /* Non-secure A…
61 /*-----------------------------------------------------------*/
79 /*-----------------------------------------------------------*/
92 /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is in SecureInit_EnableNSFPUAccess()
96 /* LSPENS = 0 ==> LSPEN is writable from non-secure state. This ensures in SecureInit_EnableNSFPUAccess()
101 * registers (S16-S31) are also pushed to stack on exception entry and in SecureInit_EnableNSFPUAccess()
106 /*-----------------------------------------------------------*/
|
| /Kernel-v11.1.0/portable/IAR/ARM_CM55/secure/ |
| D | secure_init.c | 5 * SPDX-License-Identifier: MIT
32 /* Secure init includes. */
56 #define secureinitNSACR ( ( volatile uint32_t * ) 0xe000ed8c ) /* Non-secure A…
61 /*-----------------------------------------------------------*/
79 /*-----------------------------------------------------------*/
92 /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is in SecureInit_EnableNSFPUAccess()
96 /* LSPENS = 0 ==> LSPEN is writable from non-secure state. This ensures in SecureInit_EnableNSFPUAccess()
101 * registers (S16-S31) are also pushed to stack on exception entry and in SecureInit_EnableNSFPUAccess()
106 /*-----------------------------------------------------------*/
|
| /Kernel-v11.1.0/portable/ARMv8M/secure/init/ |
| D | secure_init.c | 5 * SPDX-License-Identifier: MIT
32 /* Secure init includes. */
56 #define secureinitNSACR ( ( volatile uint32_t * ) 0xe000ed8c ) /* Non-secure A…
61 /*-----------------------------------------------------------*/
79 /*-----------------------------------------------------------*/
92 /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is in SecureInit_EnableNSFPUAccess()
96 /* LSPENS = 0 ==> LSPEN is writable from non-secure state. This ensures in SecureInit_EnableNSFPUAccess()
101 * registers (S16-S31) are also pushed to stack on exception entry and in SecureInit_EnableNSFPUAccess()
106 /*-----------------------------------------------------------*/
|
| /Kernel-v11.1.0/portable/GCC/ARM_CM23/secure/ |
| D | secure_init.c | 5 * SPDX-License-Identifier: MIT
32 /* Secure init includes. */
56 #define secureinitNSACR ( ( volatile uint32_t * ) 0xe000ed8c ) /* Non-secure A…
61 /*-----------------------------------------------------------*/
79 /*-----------------------------------------------------------*/
92 /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is in SecureInit_EnableNSFPUAccess()
96 /* LSPENS = 0 ==> LSPEN is writable from non-secure state. This ensures in SecureInit_EnableNSFPUAccess()
101 * registers (S16-S31) are also pushed to stack on exception entry and in SecureInit_EnableNSFPUAccess()
106 /*-----------------------------------------------------------*/
|
| /Kernel-v11.1.0/portable/IAR/ARM_CM35P/secure/ |
| D | secure_init.c | 5 * SPDX-License-Identifier: MIT
32 /* Secure init includes. */
56 #define secureinitNSACR ( ( volatile uint32_t * ) 0xe000ed8c ) /* Non-secure A…
61 /*-----------------------------------------------------------*/
79 /*-----------------------------------------------------------*/
92 /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is in SecureInit_EnableNSFPUAccess()
96 /* LSPENS = 0 ==> LSPEN is writable from non-secure state. This ensures in SecureInit_EnableNSFPUAccess()
101 * registers (S16-S31) are also pushed to stack on exception entry and in SecureInit_EnableNSFPUAccess()
106 /*-----------------------------------------------------------*/
|
| /Kernel-v11.1.0/portable/GCC/ARM_CM85/secure/ |
| D | secure_init.c | 5 * SPDX-License-Identifier: MIT
32 /* Secure init includes. */
56 #define secureinitNSACR ( ( volatile uint32_t * ) 0xe000ed8c ) /* Non-secure A…
61 /*-----------------------------------------------------------*/
79 /*-----------------------------------------------------------*/
92 /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is in SecureInit_EnableNSFPUAccess()
96 /* LSPENS = 0 ==> LSPEN is writable from non-secure state. This ensures in SecureInit_EnableNSFPUAccess()
101 * registers (S16-S31) are also pushed to stack on exception entry and in SecureInit_EnableNSFPUAccess()
106 /*-----------------------------------------------------------*/
|
| /Kernel-v11.1.0/portable/GCC/ARM_CM33/secure/ |
| D | secure_init.c | 5 * SPDX-License-Identifier: MIT
32 /* Secure init includes. */
56 #define secureinitNSACR ( ( volatile uint32_t * ) 0xe000ed8c ) /* Non-secure A…
61 /*-----------------------------------------------------------*/
79 /*-----------------------------------------------------------*/
92 /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is in SecureInit_EnableNSFPUAccess()
96 /* LSPENS = 0 ==> LSPEN is writable from non-secure state. This ensures in SecureInit_EnableNSFPUAccess()
101 * registers (S16-S31) are also pushed to stack on exception entry and in SecureInit_EnableNSFPUAccess()
106 /*-----------------------------------------------------------*/
|
| /Kernel-v11.1.0/ |
| D | README.md | 1 …eRTOS-Kernel/actions/workflows/unit-tests.yml/badge.svg?branch=main&event=push)](https://github.co…
2 …(https://codecov.io/gh/FreeRTOS/FreeRTOS-Kernel/badge.svg?branch=main)](https://codecov.io/gh/Free…
9 repository, which contains pre-configured demo application projects under
12 The easiest way to use FreeRTOS is to start with one of the pre-configured demo
17 [FreeRTOS Kernel Quick Start Guide](https://www.FreeRTOS.org/FreeRTOS-quick-start-guide.html)
25 [the instructions here](.github/CONTRIBUTING.md#contributing-via-pull-request).
33 ## To consume FreeRTOS-Kernel
40 - Define the source and version/tag you want to use:
44 GIT_REPOSITORY https://github.com/FreeRTOS/FreeRTOS-Kernel.git
45 GIT_TAG main #Note: Best practice to use specific git-hash or tagged version
[all …]
|
| D | sbom.spdx | 1 SPDXVersion: SPDX-2.2
2 DataLicense: CC0-1.0
3 SPDXID: SPDXRef-DOCUMENT
4 DocumentName: FreeRTOS-Kernel
5 DocumentNamespace: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/v11.1.0/sbom.spdx
7 Created: 2024-04-22T07:38:21Z
11 PackageName: FreeRTOS-Kernel
12 SPDXID: SPDXRef-Package-FreeRTOS-Kernel
15 PackageDownloadLocation: https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/v11.1.0
26 SPDXID: SPDXRef-File-timers.c
[all …]
|
| /Kernel-v11.1.0/portable/ARMv8M/ |
| D | copy_files.py | 5 # * SPDX-License-Identifier: MIT
43 os.path.join('secure', 'init'),
64 # Files to be compiled in the Non-Secure Project
162 # Copy Non-Secure Files
|
| /Kernel-v11.1.0/portable/Paradigm/Tern_EE/large_untested/ |
| D | port.c | 5 * SPDX-License-Identifier: MIT
30 /*-----------------------------------------------------------
33 *----------------------------------------------------------*/
77 /*-----------------------------------------------------------*/
87 pxTopOfStack--; in pxPortInitialiseStack()
89 pxTopOfStack--; in pxPortInitialiseStack()
91 pxTopOfStack--; in pxPortInitialiseStack()
98 pxTopOfStack--; in pxPortInitialiseStack()
100 pxTopOfStack--; in pxPortInitialiseStack()
102 pxTopOfStack--; in pxPortInitialiseStack()
[all …]
|
