1 /*
2 * FreeRTOS Kernel V10.6.2
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
26 *
27 */
28
29 #ifndef PORTMACRO_H
30 #define PORTMACRO_H
31
32 /* *INDENT-OFF* */
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
36 /* *INDENT-ON* */
37
38 /*-----------------------------------------------------------
39 * Port specific definitions.
40 *
41 * The settings in this file configure FreeRTOS correctly for the
42 * given hardware and compiler.
43 *
44 * These settings should not be altered.
45 *-----------------------------------------------------------
46 */
47
48 /* Type definitions. */
49 #define portCHAR char
50 #define portFLOAT float
51 #define portDOUBLE double
52 #define portLONG long
53 #define portSHORT short
54 #define portSTACK_TYPE uint32_t
55 #define portBASE_TYPE long
56
57 typedef portSTACK_TYPE StackType_t;
58 typedef long BaseType_t;
59 typedef unsigned long UBaseType_t;
60
61 #if( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
62 typedef uint16_t TickType_t;
63 #define portMAX_DELAY ( TickType_t ) 0xffff
64 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
65 typedef uint32_t TickType_t;
66 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
67 #else
68 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
69 #endif
70 /*-----------------------------------------------------------*/
71
72 /* Hardware specifics. */
73 #define portBYTE_ALIGNMENT 8
74 #define portSTACK_GROWTH -1
75 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
76 /*-----------------------------------------------------------*/
77
78 /* Critical section management. */
79 #define portIPL_SHIFT ( 10UL )
80 /* Don't straddle the CEE bit. Interrupts calling FreeRTOS functions should
81 never have higher IPL bits set anyway. */
82 #define portALL_IPL_BITS ( 0x7FUL << portIPL_SHIFT )
83 #define portSW0_BIT ( 0x01 << 8 )
84
85 /* Interrupt priority conversion */
86 #define portIPL_TO_CODE( iplNumber ) ( ( iplNumber >> 1 ) & 0x03ul )
87 #define portCODE_TO_IPL( iplCode ) ( ( iplCode << 1 ) | 0x01ul )
88
89 /*-----------------------------------------------------------*/
90
ulPortGetCP0Status(void)91 static inline uint32_t ulPortGetCP0Status( void )
92 {
93 uint32_t rv;
94
95 __asm volatile(
96 "\n\t"
97 "mfc0 %0,$12,0 \n\t"
98 : "=r" ( rv ) :: );
99
100 return rv;
101 }
102 /*-----------------------------------------------------------*/
103
vPortSetCP0Status(uint32_t new_status)104 static inline void vPortSetCP0Status( uint32_t new_status)
105 {
106 ( void ) new_status;
107
108 __asm__ __volatile__(
109 "\n\t"
110 "mtc0 %0,$12,0 \n\t"
111 "ehb \n\t"
112 :
113 :"r" ( new_status ) : );
114 }
115 /*-----------------------------------------------------------*/
116
ulPortGetCP0Cause(void)117 static inline uint32_t ulPortGetCP0Cause( void )
118 {
119 uint32_t rv;
120
121 __asm volatile(
122 "\n\t"
123 "mfc0 %0,$13,0 \n\t"
124 : "=r" ( rv ) :: );
125
126 return rv;
127 }
128 /*-----------------------------------------------------------*/
129
vPortSetCP0Cause(uint32_t new_cause)130 static inline void vPortSetCP0Cause( uint32_t new_cause )
131 {
132 ( void ) new_cause;
133
134 __asm__ __volatile__(
135 "\n\t"
136 "mtc0 %0,$13,0 \n\t"
137 "ehb \n\t"
138 :
139 :"r" ( new_cause ) : );
140 }
141 /*-----------------------------------------------------------*/
142
143 /* This clears the IPL bits, then sets them to
144 configMAX_SYSCALL_INTERRUPT_PRIORITY. An extra check is performed if
145 configASSERT() is defined to ensure an assertion handler does not inadvertently
146 attempt to lower the IPL when the call to assert was triggered because the IPL
147 value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY when an ISR
148 safe FreeRTOS API function was executed. ISR safe FreeRTOS API functions are
149 those that end in FromISR. FreeRTOS maintains a separate interrupt API to
150 ensure API function and interrupt entry is as fast and as simple as possible. */
151 #ifdef configASSERT
152 #define portDISABLE_INTERRUPTS() \
153 { \
154 uint32_t ulStatus; \
155 /* Mask interrupts at and below the kernel interrupt priority. */ \
156 ulStatus = ulPortGetCP0Status(); \
157 /* Is the current IPL below configMAX_SYSCALL_INTERRUPT_PRIORITY? */ \
158 if( ( ( ulStatus & portALL_IPL_BITS ) >> portIPL_SHIFT ) < configMAX_SYSCALL_INTERRUPT_PRIORITY ) \
159 { \
160 ulStatus &= ~portALL_IPL_BITS; \
161 vPortSetCP0Status( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \
162 } \
163 }
164 #else /* configASSERT */
165 #define portDISABLE_INTERRUPTS() \
166 { \
167 uint32_t ulStatus; \
168 /* Mask interrupts at and below the kernel interrupt priority. */ \
169 ulStatus = ulPortGetCP0Status(); \
170 ulStatus &= ~portALL_IPL_BITS; \
171 vPortSetCP0Status( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \
172 }
173 #endif /* configASSERT */
174
175 #define portENABLE_INTERRUPTS() \
176 { \
177 uint32_t ulStatus; \
178 /* Unmask all interrupts. */ \
179 ulStatus = ulPortGetCP0Status(); \
180 ulStatus &= ~portALL_IPL_BITS; \
181 vPortSetCP0Status( ulStatus ); \
182 }
183
184
185 extern void vTaskEnterCritical( void );
186 extern void vTaskExitCritical( void );
187 #define portCRITICAL_NESTING_IN_TCB 1
188 #define portENTER_CRITICAL() vTaskEnterCritical()
189 #define portEXIT_CRITICAL() vTaskExitCritical()
190
191 extern UBaseType_t uxPortSetInterruptMaskFromISR();
192 extern void vPortClearInterruptMaskFromISR( UBaseType_t );
193 #define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMaskFromISR()
194 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) vPortClearInterruptMaskFromISR( uxSavedStatusRegister )
195
196 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
197 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
198 #endif
199
200 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
201
202 /* Check the configuration. */
203 #if( configMAX_PRIORITIES > 32 )
204 #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
205 #endif
206
207 /* Store/clear the ready priorities in a bit map. */
208 #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
209 #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
210
211 /*-----------------------------------------------------------*/
212
213 #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - _clz( ( uxReadyPriorities ) ) )
214
215 #endif /* taskRECORD_READY_PRIORITY */
216
217 /*-----------------------------------------------------------*/
218
219 /* Task utilities. */
220
221 #define portYIELD() \
222 { \
223 uint32_t ulCause; \
224 /* Trigger software interrupt. */ \
225 ulCause = ulPortGetCP0Cause(); \
226 ulCause |= portSW0_BIT; \
227 vPortSetCP0Cause( ulCause ); \
228 }
229
230 extern volatile UBaseType_t uxInterruptNesting;
231 #define portASSERT_IF_IN_ISR() configASSERT( uxInterruptNesting == 0 )
232
233 #define portNOP() __asm volatile ( "nop" )
234
235 /*-----------------------------------------------------------*/
236
237 /* Task function macros as described on the FreeRTOS.org WEB site. */
238 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) __attribute__((noreturn))
239 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
240 /*-----------------------------------------------------------*/
241
242 #define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired ) { portYIELD(); } } while( 0 )
243
244 /* Required by the kernel aware debugger. */
245 #ifdef __DEBUG
246 #define portREMOVE_STATIC_QUALIFIER
247 #endif
248
249 /* *INDENT-OFF* */
250 #ifdef __cplusplus
251 }
252 #endif
253 /* *INDENT-ON* */
254
255 #endif /* PORTMACRO_H */
256