1 /*
2 * FreeRTOS Kernel V11.1.0
3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 * Copyright (c) 2021 Raspberry Pi (Trading) Ltd.
5 *
6 * SPDX-License-Identifier: MIT AND BSD-3-Clause
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy of
9 * this software and associated documentation files (the "Software"), to deal in
10 * the Software without restriction, including without limitation the rights to
11 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
12 * the Software, and to permit persons to whom the Software is furnished to do so,
13 * subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in all
16 * copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
20 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
21 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
22 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
23 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 * https://www.FreeRTOS.org
26 * https://github.com/FreeRTOS
27 *
28 */
29
30 #ifndef PORTMACRO_H
31 #define PORTMACRO_H
32
33 /* *INDENT-OFF* */
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37 /* *INDENT-ON* */
38
39 #include "pico.h"
40 #include "hardware/sync.h"
41
42 /*-----------------------------------------------------------
43 * Port specific definitions.
44 *
45 * The settings in this file configure FreeRTOS correctly for the
46 * given hardware and compiler.
47 *
48 * These settings should not be altered.
49 *-----------------------------------------------------------
50 */
51
52 /* Type definitions. */
53 #define portCHAR char
54 #define portFLOAT float
55 #define portDOUBLE double
56 #define portLONG long
57 #define portSHORT short
58 #define portSTACK_TYPE uint32_t
59 #define portBASE_TYPE long
60
61 typedef portSTACK_TYPE StackType_t;
62 typedef int32_t BaseType_t;
63 typedef uint32_t UBaseType_t;
64
65 #if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
66 typedef uint16_t TickType_t;
67 #define portMAX_DELAY ( TickType_t ) 0xffff
68 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
69 typedef uint32_t TickType_t;
70 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
71
72 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
73 * not need to be guarded with a critical section. */
74 #define portTICK_TYPE_IS_ATOMIC 1
75 #else
76 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
77 #endif
78 /*-----------------------------------------------------------*/
79
80 /* Architecture specifics. */
81 #define portSTACK_GROWTH ( -1 )
82 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
83 #define portBYTE_ALIGNMENT 8
84 #define portDONT_DISCARD __attribute__( ( used ) )
85
86 /* We have to use PICO_DIVIDER_DISABLE_INTERRUPTS as the source of truth rathern than our config,
87 * as our FreeRTOSConfig.h header cannot be included by ASM code - which is what this affects in the SDK */
88 #define portUSE_DIVIDER_SAVE_RESTORE !PICO_DIVIDER_DISABLE_INTERRUPTS
89 #if portUSE_DIVIDER_SAVE_RESTORE
90 #define portSTACK_LIMIT_PADDING 4
91 #endif
92
93 /*-----------------------------------------------------------*/
94
95
96 /* Scheduler utilities. */
97 extern void vPortYield( void );
98 #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
99 #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
100 #define portYIELD() vPortYield()
101 #define portEND_SWITCHING_ISR( xSwitchRequired ) \
102 do \
103 { \
104 if( xSwitchRequired ) \
105 { \
106 traceISR_EXIT_TO_SCHEDULER(); \
107 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
108 } \
109 else \
110 { \
111 traceISR_EXIT(); \
112 } \
113 } while( 0 )
114 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
115
116 /*-----------------------------------------------------------*/
117
118 /* Exception handlers */
119 #if ( configUSE_DYNAMIC_EXCEPTION_HANDLERS == 0 )
120 /* We only need to override the SDK's weak functions if we want to replace them at compile time */
121 #define vPortSVCHandler isr_svcall
122 #define xPortPendSVHandler isr_pendsv
123 #define xPortSysTickHandler isr_systick
124 #endif
125
126 /*-----------------------------------------------------------*/
127
128 /* Multi-core */
129 #define portMAX_CORE_COUNT 2
130
131 /* Check validity of number of cores specified in config */
132 #if ( configNUMBER_OF_CORES < 1 || portMAX_CORE_COUNT < configNUMBER_OF_CORES )
133 #error "Invalid number of cores specified in config!"
134 #endif
135
136 #if ( configTICK_CORE < 0 || configTICK_CORE > configNUMBER_OF_CORES )
137 #error "Invalid tick core specified in config!"
138 #endif
139 /* FreeRTOS core id is always zero based, so always 0 if we're running on only one core */
140 #if configNUMBER_OF_CORES == portMAX_CORE_COUNT
141 #define portGET_CORE_ID() get_core_num()
142 #else
143 #define portGET_CORE_ID() 0
144 #endif
145
146 #define portCHECK_IF_IN_ISR() \
147 ( { \
148 uint32_t ulIPSR; \
149 __asm volatile ( "mrs %0, IPSR" : "=r" ( ulIPSR )::); \
150 ( ( uint8_t ) ulIPSR ) > 0; } )
151
152 void vYieldCore( int xCoreID );
153 #define portYIELD_CORE( a ) vYieldCore( a )
154 #define portRESTORE_INTERRUPTS( ulState ) __asm volatile ( "msr PRIMASK,%0" ::"r" ( ulState ) : )
155
156 /*-----------------------------------------------------------*/
157
158 /* Critical nesting count management. */
159 extern UBaseType_t uxCriticalNestings[ configNUMBER_OF_CORES ];
160 #define portGET_CRITICAL_NESTING_COUNT() ( uxCriticalNestings[ portGET_CORE_ID() ] )
161 #define portSET_CRITICAL_NESTING_COUNT( x ) ( uxCriticalNestings[ portGET_CORE_ID() ] = ( x ) )
162 #define portINCREMENT_CRITICAL_NESTING_COUNT() ( uxCriticalNestings[ portGET_CORE_ID() ]++ )
163 #define portDECREMENT_CRITICAL_NESTING_COUNT() ( uxCriticalNestings[ portGET_CORE_ID() ]-- )
164
165 /*-----------------------------------------------------------*/
166
167 /* Critical section management. */
168
169 #define portSET_INTERRUPT_MASK() \
170 ( { \
171 uint32_t ulState; \
172 __asm volatile ( "mrs %0, PRIMASK" : "=r" ( ulState )::); \
173 __asm volatile ( " cpsid i " ::: "memory" ); \
174 ulState; } )
175
176 #define portCLEAR_INTERRUPT_MASK( ulState ) __asm volatile ( "msr PRIMASK,%0" ::"r" ( ulState ) : )
177
178 extern uint32_t ulSetInterruptMaskFromISR( void ) __attribute__( ( naked ) );
179 extern void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__( ( naked ) );
180 #define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR()
181 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMaskFromISR( x )
182
183 #define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" )
184
185 extern void vPortEnableInterrupts();
186 #define portENABLE_INTERRUPTS() vPortEnableInterrupts()
187
188 #if ( configNUMBER_OF_CORES == 1 )
189 extern void vPortEnterCritical( void );
190 extern void vPortExitCritical( void );
191 #define portENTER_CRITICAL() vPortEnterCritical()
192 #define portEXIT_CRITICAL() vPortExitCritical()
193 #else
194 extern void vTaskEnterCritical( void );
195 extern void vTaskExitCritical( void );
196 extern UBaseType_t vTaskEnterCriticalFromISR( void );
197 extern void vTaskExitCriticalFromISR( UBaseType_t uxSavedInterruptStatus );
198 #define portENTER_CRITICAL() vTaskEnterCritical()
199 #define portEXIT_CRITICAL() vTaskExitCritical()
200 #define portENTER_CRITICAL_FROM_ISR() vTaskEnterCriticalFromISR()
201 #define portEXIT_CRITICAL_FROM_ISR( x ) vTaskExitCriticalFromISR( x )
202 #endif /* if ( configNUMBER_OF_CORES == 1 ) */
203
204 #define portRTOS_SPINLOCK_COUNT 2
205
206 /* Note this is a single method with uxAcquire parameter since we have
207 * static vars, the method is always called with a compile time constant for
208 * uxAcquire, and the compiler should dothe right thing! */
vPortRecursiveLock(uint32_t ulLockNum,spin_lock_t * pxSpinLock,BaseType_t uxAcquire)209 static inline void vPortRecursiveLock( uint32_t ulLockNum,
210 spin_lock_t * pxSpinLock,
211 BaseType_t uxAcquire )
212 {
213 static uint8_t ucOwnedByCore[ portMAX_CORE_COUNT ];
214 static uint8_t ucRecursionCountByLock[ portRTOS_SPINLOCK_COUNT ];
215
216 configASSERT( ulLockNum < portRTOS_SPINLOCK_COUNT );
217 uint32_t ulCoreNum = get_core_num();
218 uint32_t ulLockBit = 1u << ulLockNum;
219 configASSERT( ulLockBit < 256u );
220
221 if( uxAcquire )
222 {
223 if( __builtin_expect( !*pxSpinLock, 0 ) )
224 {
225 if( ucOwnedByCore[ ulCoreNum ] & ulLockBit )
226 {
227 configASSERT( ucRecursionCountByLock[ ulLockNum ] != 255u );
228 ucRecursionCountByLock[ ulLockNum ]++;
229 return;
230 }
231
232 while( __builtin_expect( !*pxSpinLock, 0 ) )
233 {
234 }
235 }
236
237 __mem_fence_acquire();
238 configASSERT( ucRecursionCountByLock[ ulLockNum ] == 0 );
239 ucRecursionCountByLock[ ulLockNum ] = 1;
240 ucOwnedByCore[ ulCoreNum ] |= ulLockBit;
241 }
242 else
243 {
244 configASSERT( ( ucOwnedByCore[ ulCoreNum ] & ulLockBit ) != 0 );
245 configASSERT( ucRecursionCountByLock[ ulLockNum ] != 0 );
246
247 if( !--ucRecursionCountByLock[ ulLockNum ] )
248 {
249 ucOwnedByCore[ ulCoreNum ] &= ~ulLockBit;
250 __mem_fence_release();
251 *pxSpinLock = 1;
252 }
253 }
254 }
255
256 #if ( configNUMBER_OF_CORES == 1 )
257 #define portGET_ISR_LOCK()
258 #define portRELEASE_ISR_LOCK()
259 #define portGET_TASK_LOCK()
260 #define portRELEASE_TASK_LOCK()
261 #else
262 #define portGET_ISR_LOCK() vPortRecursiveLock( 0, spin_lock_instance( configSMP_SPINLOCK_0 ), pdTRUE )
263 #define portRELEASE_ISR_LOCK() vPortRecursiveLock( 0, spin_lock_instance( configSMP_SPINLOCK_0 ), pdFALSE )
264 #define portGET_TASK_LOCK() vPortRecursiveLock( 1, spin_lock_instance( configSMP_SPINLOCK_1 ), pdTRUE )
265 #define portRELEASE_TASK_LOCK() vPortRecursiveLock( 1, spin_lock_instance( configSMP_SPINLOCK_1 ), pdFALSE )
266 #endif
267
268 /*-----------------------------------------------------------*/
269
270 /* Tickless idle/low power functionality. */
271 #ifndef portSUPPRESS_TICKS_AND_SLEEP
272 extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
273 #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
274 #endif
275 /*-----------------------------------------------------------*/
276
277 /* Task function macros as described on the FreeRTOS.org WEB site. */
278 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
279 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
280
281 #define portNOP() __asm volatile ( "nop" )
282
283 #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
284
285 /* *INDENT-OFF* */
286 #ifdef __cplusplus
287 }
288 #endif
289 /* *INDENT-ON* */
290
291 #endif /* PORTMACRO_H */
292
