1 /* 2 * FreeRTOS Kernel V11.1.0 3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. 4 * 5 * SPDX-License-Identifier: MIT 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy of 8 * this software and associated documentation files (the "Software"), to deal in 9 * the Software without restriction, including without limitation the rights to 10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of 11 * the Software, and to permit persons to whom the Software is furnished to do so, 12 * subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in all 15 * copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * https://www.FreeRTOS.org 25 * https://github.com/FreeRTOS 26 * 27 */ 28 29 /* 30 * Changes from V3.2.3 31 * 32 + Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1. 33 + 34 + Changes from V3.2.4 35 + 36 + Removed the use of the %0 parameter within the assembler macros and 37 + replaced them with hard coded registers. This will ensure the 38 + assembler does not select the link register as the temp register as 39 + was occasionally happening previously. 40 + 41 + The assembler statements are now included in a single asm block rather 42 + than each line having its own asm block. 43 + 44 + Changes from V4.5.0 45 + 46 + Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros 47 + and replaced them with portYIELD_FROM_ISR() macro. Application code 48 + should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT() 49 + macros as per the V4.5.1 demo code. 50 */ 51 52 #ifndef PORTMACRO_H 53 #define PORTMACRO_H 54 55 /* *INDENT-OFF* */ 56 #ifdef __cplusplus 57 extern "C" { 58 #endif 59 /* *INDENT-ON* */ 60 61 /*----------------------------------------------------------- 62 * Port specific definitions. 63 * 64 * The settings in this file configure FreeRTOS correctly for the 65 * given hardware and compiler. 66 * 67 * These settings should not be altered. 68 *----------------------------------------------------------- 69 */ 70 71 /* Type definitions. */ 72 #define portCHAR char 73 #define portFLOAT float 74 #define portDOUBLE double 75 #define portLONG long 76 #define portSHORT short 77 #define portSTACK_TYPE uint32_t 78 #define portBASE_TYPE long 79 80 typedef portSTACK_TYPE StackType_t; 81 typedef long BaseType_t; 82 typedef unsigned long UBaseType_t; 83 84 #if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) 85 typedef uint16_t TickType_t; 86 #define portMAX_DELAY ( TickType_t ) 0xffff 87 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS ) 88 typedef uint32_t TickType_t; 89 #define portMAX_DELAY ( TickType_t ) ( 0xFFFFFFFFUL ) 90 #else 91 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width. 92 #endif 93 /*-----------------------------------------------------------*/ 94 95 /* Hardware specifics. */ 96 #define portSTACK_GROWTH ( -1 ) 97 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) 98 #define portBYTE_ALIGNMENT 8 99 #define portYIELD() asm volatile ( "SWI 0" ) 100 #define portNOP() asm volatile ( "NOP" ) 101 102 /* 103 * These define the timer to use for generating the tick interrupt. 104 * They are put in this file so they can be shared between "port.c" 105 * and "portisr.c". 106 */ 107 #define portTIMER_REG_BASE_PTR AT91C_BASE_TC0 108 #define portTIMER_CLK_ENABLE_BIT AT91C_PS_TC0 109 #define portTIMER_AIC_CHANNEL ( ( uint32_t ) 4 ) 110 /*-----------------------------------------------------------*/ 111 112 /* Task utilities. */ 113 114 /* 115 * portRESTORE_CONTEXT, portRESTORE_CONTEXT, portENTER_SWITCHING_ISR 116 * and portEXIT_SWITCHING_ISR can only be called from ARM mode, but 117 * are included here for efficiency. An attempt to call one from 118 * THUMB mode code will result in a compile time error. 119 */ 120 121 #define portRESTORE_CONTEXT() \ 122 { \ 123 extern volatile void * volatile pxCurrentTCB; \ 124 extern volatile uint32_t ulCriticalNesting; \ 125 \ 126 /* Set the LR to the task stack. */ \ 127 asm volatile ( \ 128 "LDR R0, =pxCurrentTCB \n\t" \ 129 "LDR R0, [R0] \n\t" \ 130 "LDR LR, [R0] \n\t" \ 131 \ 132 /* The critical nesting depth is the first item on the stack. */ \ 133 /* Load it into the ulCriticalNesting variable. */ \ 134 "LDR R0, =ulCriticalNesting \n\t" \ 135 "LDMFD LR!, {R1} \n\t" \ 136 "STR R1, [R0] \n\t" \ 137 \ 138 /* Get the SPSR from the stack. */ \ 139 "LDMFD LR!, {R0} \n\t" \ 140 "MSR SPSR, R0 \n\t" \ 141 \ 142 /* Restore all system mode registers for the task. */ \ 143 "LDMFD LR, {R0-R14}^ \n\t" \ 144 "NOP \n\t" \ 145 \ 146 /* Restore the return address. */ \ 147 "LDR LR, [LR, #+60] \n\t" \ 148 \ 149 /* And return - correcting the offset in the LR to obtain the */ \ 150 /* correct address. */ \ 151 "SUBS PC, LR, #4 \n\t" \ 152 ); \ 153 ( void ) ulCriticalNesting; \ 154 ( void ) pxCurrentTCB; \ 155 } 156 /*-----------------------------------------------------------*/ 157 158 #define portSAVE_CONTEXT() \ 159 { \ 160 extern volatile void * volatile pxCurrentTCB; \ 161 extern volatile uint32_t ulCriticalNesting; \ 162 \ 163 /* Push R0 as we are going to use the register. */ \ 164 asm volatile ( \ 165 "STMDB SP!, {R0} \n\t" \ 166 \ 167 /* Set R0 to point to the task stack pointer. */ \ 168 "STMDB SP,{SP}^ \n\t" \ 169 "NOP \n\t" \ 170 "SUB SP, SP, #4 \n\t" \ 171 "LDMIA SP!,{R0} \n\t" \ 172 \ 173 /* Push the return address onto the stack. */ \ 174 "STMDB R0!, {LR} \n\t" \ 175 \ 176 /* Now we have saved LR we can use it instead of R0. */ \ 177 "MOV LR, R0 \n\t" \ 178 \ 179 /* Pop R0 so we can save it onto the system mode stack. */ \ 180 "LDMIA SP!, {R0} \n\t" \ 181 \ 182 /* Push all the system mode registers onto the task stack. */ \ 183 "STMDB LR,{R0-LR}^ \n\t" \ 184 "NOP \n\t" \ 185 "SUB LR, LR, #60 \n\t" \ 186 \ 187 /* Push the SPSR onto the task stack. */ \ 188 "MRS R0, SPSR \n\t" \ 189 "STMDB LR!, {R0} \n\t" \ 190 \ 191 "LDR R0, =ulCriticalNesting \n\t" \ 192 "LDR R0, [R0] \n\t" \ 193 "STMDB LR!, {R0} \n\t" \ 194 \ 195 /* Store the new top of stack for the task. */ \ 196 "LDR R0, =pxCurrentTCB \n\t" \ 197 "LDR R0, [R0] \n\t" \ 198 "STR LR, [R0] \n\t" \ 199 ); \ 200 ( void ) ulCriticalNesting; \ 201 ( void ) pxCurrentTCB; \ 202 } 203 204 #define portYIELD_FROM_ISR() vTaskSwitchContext() 205 206 /* Critical section handling. */ 207 208 /* 209 * The interrupt management utilities can only be called from ARM mode. When 210 * THUMB_INTERWORK is defined the utilities are defined as functions in 211 * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not 212 * defined then the utilities are defined as macros here - as per other ports. 213 */ 214 215 #ifdef THUMB_INTERWORK 216 217 extern void vPortDisableInterruptsFromThumb( void ) __attribute__( ( naked ) ); 218 extern void vPortEnableInterruptsFromThumb( void ) __attribute__( ( naked ) ); 219 220 #define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb() 221 #define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb() 222 223 #else 224 225 #define portDISABLE_INTERRUPTS() \ 226 asm volatile ( \ 227 "STMDB SP!, {R0} \n\t" /* Push R0. */ \ 228 "MRS R0, CPSR \n\t" /* Get CPSR. */ \ 229 "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \ 230 "MSR CPSR, R0 \n\t" /* Write back modified value. */ \ 231 "LDMIA SP!, {R0} " ) /* Pop R0. */ 232 233 #define portENABLE_INTERRUPTS() \ 234 asm volatile ( \ 235 "STMDB SP!, {R0} \n\t" /* Push R0. */ \ 236 "MRS R0, CPSR \n\t" /* Get CPSR. */ \ 237 "BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ \ 238 "MSR CPSR, R0 \n\t" /* Write back modified value. */ \ 239 "LDMIA SP!, {R0} " ) /* Pop R0. */ 240 241 #endif /* THUMB_INTERWORK */ 242 243 extern void vPortEnterCritical( void ); 244 extern void vPortExitCritical( void ); 245 246 #define portENTER_CRITICAL() vPortEnterCritical(); 247 #define portEXIT_CRITICAL() vPortExitCritical(); 248 249 /*-----------------------------------------------------------*/ 250 251 /* Task function macros as described on the FreeRTOS.org WEB site. */ 252 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) 253 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) 254 255 /* *INDENT-OFF* */ 256 #ifdef __cplusplus 257 } 258 #endif 259 /* *INDENT-ON* */ 260 261 #endif /* PORTMACRO_H */ 262
