Lines Matching refs:configASSERT

372         configASSERT( ucPrimaryCoreNum == INVALID_PRIMARY_CORE_NUM );  in xPortStartScheduler()
380             configASSERT( get_core_num() == 0 ); /* we must be started on core 0 */  in xPortStartScheduler()
459         configASSERT( pxYieldSpinLock[ portGET_CORE_ID() ] == NULL );  in vPortYield()
487         configASSERT( uxCriticalNesting );  in vPortExitCritical()
542     configASSERT( xCoreID != ( int ) portGET_CORE_ID() );  in vYieldCore()
1023         configASSERT( !portCHECK_IF_IN_ISR() );  in vPortLockInternalSpinUnlockWithWait()
1033             configASSERT( pxYieldSpinLock[ portGET_CORE_ID() ] == NULL );  in vPortLockInternalSpinUnlockWithWait()
1038             configASSERT( pxLock->spin_lock );  in vPortLockInternalSpinUnlockWithWait()
1101         configASSERT( !portCHECK_IF_IN_ISR() );  in xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout()
1111             configASSERT( portIS_FREE_RTOS_CORE() );  in xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout()
1112             configASSERT( pxYieldSpinLock[ portGET_CORE_ID() ] == NULL );  in xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout()
1121                 configASSERT( pxLock->spin_lock );  in xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout()