44      ORCCR #0x20                                ;Switch to user stack
51      ANDCCR #0xDF                               ;Switch back to system stack
53      ORCCR #0x20                                ;Switch to user stack
56      ANDCCR #0xDF                               ;Switch back to system stack
58      ORCCR #0x20                                ;Switch to user stack
65 …   ANDCCR #0xDF                               ;Switch back to system stack for the rest of tick ISR
71      ORCCR #0x20                                ;Switch to user stack
75      ANDCCR #0xDF                               ;Switch to system stack
78      ORCCR #0x20                                ;Switch to user stack
80      ANDCCR #0xDF                               ;Switch to system stack
83      ORCCR #0x20                                ;Switch back to retrieve the remaining context
91 …   ANDCCR #0xDF                               ;Switch back to system stack for the rest of tick ISR
114     *pxTopOfStack = 0x11111111;  in pxPortInitialiseStack()
116     *pxTopOfStack = 0x22222222;  in pxPortInitialiseStack()
118     *pxTopOfStack = 0x33333333;  in pxPortInitialiseStack()
127     *pxTopOfStack = ( StackType_t ) 0x00000000; /* RP */  in pxPortInitialiseStack()
129     *pxTopOfStack = ( StackType_t ) 0x00007777; /* R7 */  in pxPortInitialiseStack()
131     *pxTopOfStack = ( StackType_t ) 0x00006666; /* R6 */  in pxPortInitialiseStack()
133     *pxTopOfStack = ( StackType_t ) 0x00005555; /* R5 */  in pxPortInitialiseStack()
142     *pxTopOfStack = ( StackType_t ) 0x00003333; /* R3 */  in pxPortInitialiseStack()
144     *pxTopOfStack = ( StackType_t ) 0x00002222; /* R2 */  in pxPortInitialiseStack()
146     *pxTopOfStack = ( StackType_t ) 0x00001111; /* R1 */  in pxPortInitialiseStack()
148     *pxTopOfStack = ( StackType_t ) 0x00000001; /* R0 */  in pxPortInitialiseStack()
150     *pxTopOfStack = ( StackType_t ) 0x0000EEEE; /* R14 */  in pxPortInitialiseStack()
152     *pxTopOfStack = ( StackType_t ) 0x0000DDDD; /* R13 */  in pxPortInitialiseStack()
154     *pxTopOfStack = ( StackType_t ) 0x0000CCCC; /* R12 */  in pxPortInitialiseStack()
156     *pxTopOfStack = ( StackType_t ) 0x0000BBBB; /* R11 */  in pxPortInitialiseStack()
158     *pxTopOfStack = ( StackType_t ) 0x0000AAAA; /* R10 */  in pxPortInitialiseStack()
160     *pxTopOfStack = ( StackType_t ) 0x00009999; /* R9 */  in pxPortInitialiseStack()
162     *pxTopOfStack = ( StackType_t ) 0x00008888; /* R8 */  in pxPortInitialiseStack()
164     *pxTopOfStack = ( StackType_t ) 0x11110000; /* MDH */  in pxPortInitialiseStack()
166     *pxTopOfStack = ( StackType_t ) 0x22220000; /* MDL */  in pxPortInitialiseStack()
174     *pxTopOfStack = ( StackType_t ) 0x001F0030; /* PS */  in pxPortInitialiseStack()
213     TMCSR0_CNTE = 0;        /* Count Disable */  in prvSetupTimerInterrupt()
214     TMCSR0_CSL = 0x2;       /* CLKP/32 */  in prvSetupTimerInterrupt()
215     TMCSR0_MOD = 0;         /* Software trigger */  in prvSetupTimerInterrupt()
218     TMCSR0_UF = 0;          /* Clear underflow flag */  in prvSetupTimerInterrupt()
224     PORTEN = 0x3;           /* Port Enable */  in prvSetupTimerInterrupt()
241     ANDCCR #0xEF                            ;Disable Interrupts
243     ORCCR #0x10                             ;Re-enable Interrupts
245     LDI #0xFFFB,R1
252     ANDCCR #0xEF                            ;Disable Interrupts
254     ORCCR #0x10                             ;Re-enable Interrupts
270         TMCSR0_UF = 0;
286     ANDCCR #0xEF                            ;Disable Interrupts
288     ORCCR #0x10                             ;Re-enable Interrupts
291     BANDL #0x0E, @R0                        ;Clear Delayed interrupt flag
295     ANDCCR #0xEF                            ;Disable Interrupts
297     ORCCR #0x10                             ;Re-enable Interrupts