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30 * Implementation of functions defined in portable.h for the ARM CM4F port.
38 …#error This port can only be used when the project options are configured to enable hardware float…
46 * replace the function that configures the clock used to generate the tick
47 * interrupt (prvSetupTimerInterrupt()), but now the function is declared weak so
48 * the application writer can override it by simply defining a function of the
54 /* Constants required to manipulate the core. Registers first... */
59 /* ...then bits in the registers. */
68 /* Constants used to detect a Cortex-M7 r0p1 core, which should use the ARM_CM7
78 /* Constants required to check the validity of an interrupt priority. */
88 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
91 /* Constants required to manipulate the VFP. */
95 /* Constants required to set up the initial stack. */
99 /* The systick is a 24-bit counter. */
102 /* A fiddle factor to estimate the number of SysTick counts that would have
103 * occurred while the SysTick counter is stopped during tickless idle
107 /* For strict compliance with the Cortex-M spec the task start address should
108 * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
111 /* Let the user override the default SysTick clock rate. If defined by the
112 * user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
116 /* Ensure the SysTick is clocked at the same frequency as the core. */
119 /* Select the option to clock SysTick not at the same frequency as the core. */
124 * Setup the timer to generate the tick interrupts. The implementation in this
125 * file is weak to allow application writers to change the timer used to
126 * generate the tick interrupt.
143 * Functions defined in portasm.s to enable the VFP.
154 /* Each task maintains its own interrupt status in the critical nesting
159 * The number of SysTick increments that make up one tick period.
166 * The maximum number of tick periods that can be suppressed is limited by the
167 * 24 bit resolution of the SysTick timer.
174 * Compensate for the CPU cycles that pass while the SysTick is stopped (low
182 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
201 /* Simulate the stack frame as it would be created by a context switch in pxPortInitialiseStack()
204 /* Offset added to account for the way the MCU uses the stack on entry/exit in pxPortInitialiseStack()
236 * defined, then stop here so application writers can catch the error. */ in prvTaskExitError()
251 /* Get the location of the current TCB. */ in vPortSVCHandler()
255 /* Pop the core registers. */ in vPortSVCHandler()
271 /* Use the NVIC offset register to locate the stack. */ in prvStartFirstTask()
275 /* Set the msp back to the start of the stack. */ in prvStartFirstTask()
278 /* Clear the bit that indicates the FPU is in use in case the FPU was used in prvStartFirstTask()
279 * before the scheduler was started - which would otherwise result in the in prvStartFirstTask()
280 * unnecessary leaving of space in the SVC stack for lazy saving of FPU in prvStartFirstTask()
289 /* Call SVC to start the first task. */ in prvStartFirstTask()
302 /* The FPU enable bits are in the CPACR. */ in prvEnableVFP()
324 /* This port can be used on all revisions of the Cortex-M7 core other than in xPortStartScheduler()
325 * the r0p1 parts. r0p1 parts should use the port from the in xPortStartScheduler()
337 /* Determine the maximum priority from which ISR safe FreeRTOS API in xPortStartScheduler()
342 * Save the interrupt priority value that is about to be clobbered. */ in xPortStartScheduler()
345 /* Determine the number of priority bits available. First write to all in xPortStartScheduler()
349 /* Read the value back to see how many bits stuck. */ in xPortStartScheduler()
352 /* Use the same mask on the maximum system call priority. */ in xPortStartScheduler()
355 /* Check that the maximum system call priority is nonzero after in xPortStartScheduler()
356 * accounting for the number of priority bits supported by the in xPortStartScheduler()
357 * hardware. A priority of 0 is invalid because setting the BASEPRI in xPortStartScheduler()
363 /* Check that the bits not implemented in hardware are zero in in xPortStartScheduler()
367 /* Calculate the maximum acceptable priority group value for the number in xPortStartScheduler()
378 /* When the hardware implements 8 priority bits, there is no way for in xPortStartScheduler()
379 * the software to configure PRIGROUP to not have sub-priorities. As in xPortStartScheduler()
380 * a result, the least significant bit is always used for sub-priority in xPortStartScheduler()
386 * are at the same preemption priority. This may appear confusing as in xPortStartScheduler()
390 * to 4, this confusion does not happen and the behaviour remains the same. in xPortStartScheduler()
392 * The following assert ensures that the sub-priority bit in the in xPortStartScheduler()
393 * configMAX_SYSCALL_INTERRUPT_PRIORITY is clear to avoid the above mentioned in xPortStartScheduler()
403 /* Shift the priority group value back to its position within the AIRCR in xPortStartScheduler()
408 /* Restore the clobbered interrupt priority register to its original in xPortStartScheduler()
414 /* Make PendSV and SysTick the lowest priority interrupts. */ in xPortStartScheduler()
418 /* Start the timer that generates the tick ISR. Interrupts are disabled in xPortStartScheduler()
422 /* Initialise the critical nesting count ready for the first task. */ in xPortStartScheduler()
425 /* Ensure the VFP is enabled - it should be anyway. */ in xPortStartScheduler()
431 /* Start the first task. */ in xPortStartScheduler()
452 /* This is not the interrupt safe version of the enter critical function so in vPortEnterCritical()
455 * the critical nesting count is 1 to protect against recursive calls if the in vPortEnterCritical()
487 /* Get the location of the current TCB. */ in xPortPendSVHandler()
491 /* Is the task using the FPU context? If so, push high vfp registers. */ in xPortPendSVHandler()
496 /* Save the core registers. */ in xPortPendSVHandler()
499 /* Save the new top of stack into the first member of the TCB. */ in xPortPendSVHandler()
512 /* The first item in pxCurrentTCB is the task top of stack. */ in xPortPendSVHandler()
516 /* Pop the core registers. */ in xPortPendSVHandler()
519 /* Is the task using the FPU context? If so, pop the high vfp registers in xPortPendSVHandler()
542 /* The SysTick runs at the lowest interrupt priority, so when this interrupt in xPortSysTickHandler()
544 * save and then restore the interrupt mask value as its value is already in xPortSysTickHandler()
545 * known - therefore the slightly faster vPortRaiseBASEPRI() function is used in xPortSysTickHandler()
550 /* Increment the RTOS tick. */ in xPortSysTickHandler()
556 * the PendSV interrupt. Pend the PendSV interrupt. */ in xPortSysTickHandler()
576 /* Make sure the SysTick reload value does not overflow the counter. */ in vPortSuppressTicksAndSleep()
582 /* Enter a critical section but don't use the taskENTER_CRITICAL() in vPortSuppressTicksAndSleep()
588 /* If a context switch is pending or a task is waiting for the scheduler in vPortSuppressTicksAndSleep()
589 * to be unsuspended then abandon the low power entry. */ in vPortSuppressTicksAndSleep()
592 /* Re-enable interrupts - see comments above the __disable_irq() in vPortSuppressTicksAndSleep()
598 /* Stop the SysTick momentarily. The time the SysTick is stopped for in vPortSuppressTicksAndSleep()
599 * is accounted for as best it can be, but using the tickless mode will in vPortSuppressTicksAndSleep()
600 * inevitably result in some tiny drift of the time maintained by the in vPortSuppressTicksAndSleep()
604 /* Use the SysTick current-value register to determine the number of in vPortSuppressTicksAndSleep()
605 * SysTick decrements remaining until the next tick interrupt. If the in vPortSuppressTicksAndSleep()
607 * ulTimerCountsForOneTick decrements remaining, not zero, because the in vPortSuppressTicksAndSleep()
608 * SysTick requests the interrupt when decrementing from 1 to 0. */ in vPortSuppressTicksAndSleep()
616 /* Calculate the reload value required to wait xExpectedIdleTime in vPortSuppressTicksAndSleep()
618 * way through the first tick period. But if the SysTick IRQ is now in vPortSuppressTicksAndSleep()
619 * pending, then clear the IRQ, suppressing the first tick, and correct in vPortSuppressTicksAndSleep()
620 * the reload value to reflect that the second tick period is already in vPortSuppressTicksAndSleep()
621 * underway. The expected idle time is always at least two ticks. */ in vPortSuppressTicksAndSleep()
635 /* Set the new reload value. */ in vPortSuppressTicksAndSleep()
638 /* Clear the SysTick count flag and set the count value back to in vPortSuppressTicksAndSleep()
648 * should not be executed again. However, the original expected idle in vPortSuppressTicksAndSleep()
662 /* Re-enable interrupts to allow the interrupt that brought the MCU in vPortSuppressTicksAndSleep()
664 * the __disable_irq() call above. */ in vPortSuppressTicksAndSleep()
669 /* Disable interrupts again because the clock is about to be stopped in vPortSuppressTicksAndSleep()
670 * and interrupts that execute while the clock is stopped will increase in vPortSuppressTicksAndSleep()
671 * any slippage between the time maintained by the RTOS and calendar in vPortSuppressTicksAndSleep()
677 /* Disable the SysTick clock without reading the in vPortSuppressTicksAndSleep()
678 * portNVIC_SYSTICK_CTRL_REG register to ensure the in vPortSuppressTicksAndSleep()
680 * the time the SysTick is stopped for is accounted for as best it can in vPortSuppressTicksAndSleep()
681 * be, but using the tickless mode will inevitably result in some tiny in vPortSuppressTicksAndSleep()
682 * drift of the time maintained by the kernel with respect to calendar in vPortSuppressTicksAndSleep()
686 /* Determine whether the SysTick has already counted to zero. */ in vPortSuppressTicksAndSleep()
691 /* The tick interrupt ended the sleep (or is now pending), and in vPortSuppressTicksAndSleep()
693 * with whatever remains of the new tick period. */ in vPortSuppressTicksAndSleep()
697 * underflowed because the post sleep hook did something in vPortSuppressTicksAndSleep()
698 * that took too long or because the SysTick current-value register in vPortSuppressTicksAndSleep()
707 /* As the pending tick will be processed as soon as this in vPortSuppressTicksAndSleep()
708 * function exits, the tick value maintained by the tick is stepped in vPortSuppressTicksAndSleep()
709 * forward by one less than the time spent waiting. */ in vPortSuppressTicksAndSleep()
714 /* Something other than the tick interrupt ended the sleep. */ in vPortSuppressTicksAndSleep()
716 /* Use the SysTick current-value register to determine the in vPortSuppressTicksAndSleep()
717 * number of SysTick decrements remaining until the expected idle in vPortSuppressTicksAndSleep()
722 /* If the SysTick is not using the core clock, the current- in vPortSuppressTicksAndSleep()
723 * value register might still be zero here. In that case, the in vPortSuppressTicksAndSleep()
724 * SysTick didn't load from the reload register, and there are in vPortSuppressTicksAndSleep()
725 * ulReloadValue decrements remaining in the expected idle in vPortSuppressTicksAndSleep()
734 /* Work out how long the sleep lasted rounded to complete tick in vPortSuppressTicksAndSleep()
735 * periods (not the ulReload value which accounted for part in vPortSuppressTicksAndSleep()
739 /* How many complete tick periods passed while the processor in vPortSuppressTicksAndSleep()
743 /* The reload value is set to whatever fraction of a single tick in vPortSuppressTicksAndSleep()
750 * the SysTick is not using the core clock, temporarily configure it to in vPortSuppressTicksAndSleep()
751 * use the core clock. This configuration forces the SysTick to load in vPortSuppressTicksAndSleep()
752 * from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next in vPortSuppressTicksAndSleep()
753 * cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready in vPortSuppressTicksAndSleep()
754 * to receive the standard value immediately. */ in vPortSuppressTicksAndSleep()
763 /* The temporary usage of the core clock has served its purpose, in vPortSuppressTicksAndSleep()
764 * as described above. Resume usage of the other clock. */ in vPortSuppressTicksAndSleep()
769 /* The partial tick period already ended. Be sure the SysTick in vPortSuppressTicksAndSleep()
779 /* Step the tick to account for any tick periods that elapsed. */ in vPortSuppressTicksAndSleep()
792 * Setup the SysTick timer to generate the tick interrupts at the required
799 /* Calculate the constants required to configure the tick interrupt. */ in vPortSetupTimerInterrupt()
808 /* Stop and clear the SysTick. */ in vPortSetupTimerInterrupt()
812 /* Configure SysTick to interrupt at the requested rate. */ in vPortSetupTimerInterrupt()
838 /* Obtain the number of the currently executing interrupt. */ in vPortValidateInterruptPriority()
841 /* Is the interrupt number a user defined interrupt? */ in vPortValidateInterruptPriority()
844 /* Look up the interrupt's priority. */ in vPortValidateInterruptPriority()
847 /* The following assertion will fail if a service routine (ISR) for in vPortValidateInterruptPriority()
855 * interrupt priorities, therefore the priority of the interrupt must in vPortValidateInterruptPriority()
859 * Interrupts that use the FreeRTOS API must not be left at their in vPortValidateInterruptPriority()
860 * default priority of zero as that is the highest possible priority, in vPortValidateInterruptPriority()
867 * The following links provide detailed information: in vPortValidateInterruptPriority()
873 /* Priority grouping: The interrupt controller (NVIC) allows the bits in vPortValidateInterruptPriority()
875 * define the interrupt's pre-emption priority bits and bits that define in vPortValidateInterruptPriority()
876 * the interrupt's sub-priority. For simplicity all bits must be defined in vPortValidateInterruptPriority()
877 * to be pre-emption priority bits. The following assertion will fail if in vPortValidateInterruptPriority()
878 * this is not the case (if some bits represent a sub-priority). in vPortValidateInterruptPriority()
880 * If the application only uses CMSIS libraries for interrupt in vPortValidateInterruptPriority()
881 * configuration then the correct setting can be achieved on all Cortex-M in vPortValidateInterruptPriority()
882 * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the in vPortValidateInterruptPriority()