Lines Matching +full:runs +full:- +full:on
5 * SPDX-License-Identifier: MIT
29 /*-----------------------------------------------------------
31 *----------------------------------------------------------*/
38 …LL_INTERRUPT_PRIORITY must not be set to 0. See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
84 /* The systick is a 24-bit counter. */
92 /* For strict compliance with the Cortex-M spec the task start address should
93 * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
132 /*-----------------------------------------------------------*/
172 /*-----------------------------------------------------------*/
183 …pxTopOfStack--; /* Offset added to account fo… in pxPortInitialiseStack()
185 pxTopOfStack--; in pxPortInitialiseStack()
187 pxTopOfStack--; in pxPortInitialiseStack()
190 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ in pxPortInitialiseStack()
192 …pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, … in pxPortInitialiseStack()
196 /*-----------------------------------------------------------*/
213 /*-----------------------------------------------------------*/
217 /* *INDENT-OFF* */ in vPortSVCHandler()
223 …ldmia r0 !, { r4 - r11 } /* Pop the registers that are not automatically saved on exception entry … in vPortSVCHandler()
230 /* *INDENT-ON* */ in vPortSVCHandler()
232 /*-----------------------------------------------------------*/
236 /* *INDENT-OFF* */ in prvStartFirstTask()
255 /* *INDENT-ON* */ in prvStartFirstTask()
257 /*-----------------------------------------------------------*/
286 /* Use the same mask on the maximum system call priority. */ in xPortStartScheduler()
294 * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ in xPortStartScheduler()
313 * the software to configure PRIGROUP to not have sub-priorities. As in xPortStartScheduler()
314 * a result, the least significant bit is always used for sub-priority in xPortStartScheduler()
315 * and there are 128 preemption priorities and 2 sub-priorities. in xPortStartScheduler()
317 * This may cause some confusion in some cases - for example, if in xPortStartScheduler()
326 * The following assert ensures that the sub-priority bit in the in xPortStartScheduler()
334 ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits; in xPortStartScheduler()
366 /*-----------------------------------------------------------*/
374 /*-----------------------------------------------------------*/
391 /*-----------------------------------------------------------*/
396 uxCriticalNesting--; in vPortExitCritical()
403 /*-----------------------------------------------------------*/
411 /* *INDENT-OFF* */ in xPortPendSVHandler()
420 stmdb r0 !, { r4 - r11 } /* Save the remaining registers. */ in xPortPendSVHandler()
435 ldmia r0 !, { r4 - r11 } /* Pop the registers and the critical nesting count. */ in xPortPendSVHandler()
440 /* *INDENT-ON* */ in xPortPendSVHandler()
442 /*-----------------------------------------------------------*/
446 /* The SysTick runs at the lowest interrupt priority, so when this interrupt in xPortSysTickHandler()
449 * known - therefore the slightly faster vPortRaiseBASEPRI() function is used in xPortSysTickHandler()
471 /*-----------------------------------------------------------*/
496 /* Re-enable interrupts - see comments above the __disable_irq() in vPortSuppressTicksAndSleep()
508 /* Use the SysTick current-value register to determine the number of in vPortSuppressTicksAndSleep()
510 * current-value register is zero, then there are actually in vPortSuppressTicksAndSleep()
521 * tick periods. -1 is used because this code normally executes part in vPortSuppressTicksAndSleep()
526 …lReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); in vPortSuppressTicksAndSleep()
531 ulReloadValue -= ulTimerCountsForOneTick; in vPortSuppressTicksAndSleep()
536 ulReloadValue -= ulStoppedTimerCompensation; in vPortSuppressTicksAndSleep()
566 /* Re-enable interrupts to allow the interrupt that brought the MCU in vPortSuppressTicksAndSleep()
598 …ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CUR… in vPortSuppressTicksAndSleep()
602 * that took too long or because the SysTick current-value register in vPortSuppressTicksAndSleep()
606 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ); in vPortSuppressTicksAndSleep()
614 ulCompleteTickPeriods = xExpectedIdleTime - 1UL; in vPortSuppressTicksAndSleep()
620 /* Use the SysTick current-value register to determine the in vPortSuppressTicksAndSleep()
626 /* If the SysTick is not using the core clock, the current- in vPortSuppressTicksAndSleep()
641 …ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecremen… in vPortSuppressTicksAndSleep()
649 …CK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDe… in vPortSuppressTicksAndSleep()
652 /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again, in vPortSuppressTicksAndSleep()
663 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; in vPortSuppressTicksAndSleep()
678 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; in vPortSuppressTicksAndSleep()
693 /*-----------------------------------------------------------*/
717 portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; in vPortSetupTimerInterrupt()
722 /*-----------------------------------------------------------*/
726 /* *INDENT-OFF* */ in vPortGetIPSR()
731 /* *INDENT-ON* */ in vPortGetIPSR()
733 /*-----------------------------------------------------------*/
772 * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html in vPortValidateInterruptPriority()
779 * define the interrupt's pre-emption priority bits and bits that define in vPortValidateInterruptPriority()
780 * the interrupt's sub-priority. For simplicity all bits must be defined in vPortValidateInterruptPriority()
781 * to be pre-emption priority bits. The following assertion will fail if in vPortValidateInterruptPriority()
782 * this is not the case (if some bits represent a sub-priority). in vPortValidateInterruptPriority()
785 * configuration then the correct setting can be achieved on all Cortex-M in vPortValidateInterruptPriority()
788 * assume a non-zero priority group setting, in which cases using a value in vPortValidateInterruptPriority()