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30 * Implementation of functions defined in portable.h for the ARM CM4F port.
37 /* Constants required to manipulate the core. Registers first... */
42 /* ...then bits in the registers. */
55 /* Constants required to check the validity of an interrupt priority. */
65 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
68 /* Constants required to manipulate the VFP. */
72 /* Constants required to set up the initial stack. */
76 /* The systick is a 24-bit counter. */
79 /* A fiddle factor to estimate the number of SysTick counts that would have
80 * occurred while the SysTick counter is stopped during tickless idle
84 /* Let the user override the default SysTick clock rate. If defined by the
85 * user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
89 /* Ensure the SysTick is clocked at the same frequency as the core. */
92 /* Select the option to clock SysTick not at the same frequency as the core. */
96 /* Let the user override the pre-loading of the initial LR with the address of
97 * prvTaskExitError() in case it messes up unwinding of the stack in the
105 /* Cannot find a weak linkage attribute, so the
106 * configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if the
124 /* Each task maintains its own interrupt status in the critical nesting
129 * Setup the timer to generate the tick interrupts. The implementation in this
130 * file is weak to allow application writers to change the timer used to
131 * generate the tick interrupt.
148 * Function to enable the VFP.
160 * The number of SysTick increments that make up one tick period.
167 * The maximum number of tick periods that can be suppressed is limited by the
168 * 24 bit resolution of the SysTick timer.
175 * Compensate for the CPU cycles that pass while the SysTick is stopped (low
183 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
201 /* Simulate the stack frame as it would be created by a context switch in pxPortInitialiseStack()
204 /* Offset added to account for the way the MCU uses the stack on entry/exit in pxPortInitialiseStack()
208 /* Sometimes the parameters are loaded from the stack. */ in pxPortInitialiseStack()
240 * defined, then stop here so application writers can catch the error. */ in prvTaskExitError()
254 ldr r3, =_pxCurrentTCB /* Restore the context. */ in vPortSVCHandler()
255 ldr r1, [ r3 ] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */ in vPortSVCHandler()
256 ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */ in vPortSVCHandler()
257 …ldm r0 !, ( r4 - r11, r14 ) /* Pop the registers that are not automatically saved on exception ent… in vPortSVCHandler()
258 msr psp, r0 /* Restore the task stack pointer. */ in vPortSVCHandler()
272 ldr r0, =0xE000ED08 /* Use the NVIC offset register to locate the stack. */ in prvPortStartFirstTask()
275 msr msp, r0 /* Set the msp back to the start of the stack. */ in prvPortStartFirstTask()
277 /* Clear the bit that indicates the FPU is in use in case the FPU was used in prvPortStartFirstTask()
278 * before the scheduler was started - which would otherwise result in the in prvPortStartFirstTask()
279 * unnecessary leaving of space in the SVC stack for lazy saving of FPU in prvPortStartFirstTask()
306 /* Determine the maximum priority from which ISR safe FreeRTOS API in xPortStartScheduler()
311 * Save the interrupt priority value that is about to be clobbered. */ in xPortStartScheduler()
314 /* Determine the number of priority bits available. First write to all in xPortStartScheduler()
318 /* Read the value back to see how many bits stuck. */ in xPortStartScheduler()
321 /* Use the same mask on the maximum system call priority. */ in xPortStartScheduler()
324 /* Check that the maximum system call priority is nonzero after in xPortStartScheduler()
325 * accounting for the number of priority bits supported by the in xPortStartScheduler()
326 * hardware. A priority of 0 is invalid because setting the BASEPRI in xPortStartScheduler()
332 /* Check that the bits not implemented in hardware are zero in in xPortStartScheduler()
336 /* Calculate the maximum acceptable priority group value for the number in xPortStartScheduler()
347 /* When the hardware implements 8 priority bits, there is no way for in xPortStartScheduler()
348 * the software to configure PRIGROUP to not have sub-priorities. As in xPortStartScheduler()
349 * a result, the least significant bit is always used for sub-priority in xPortStartScheduler()
355 * are at the same preemption priority. This may appear confusing as in xPortStartScheduler()
359 * to 4, this confusion does not happen and the behaviour remains the same. in xPortStartScheduler()
361 * The following assert ensures that the sub-priority bit in the in xPortStartScheduler()
362 * configMAX_SYSCALL_INTERRUPT_PRIORITY is clear to avoid the above mentioned in xPortStartScheduler()
372 /* Shift the priority group value back to its position within the AIRCR in xPortStartScheduler()
377 /* Restore the clobbered interrupt priority register to its original in xPortStartScheduler()
383 /* Make PendSV and SysTick the lowest priority interrupts. */ in xPortStartScheduler()
387 /* Start the timer that generates the tick ISR. Interrupts are disabled in xPortStartScheduler()
391 /* Initialise the critical nesting count ready for the first task. */ in xPortStartScheduler()
394 /* Ensure the VFP is enabled - it should be anyway. */ in xPortStartScheduler()
400 /* Start the first task. */ in xPortStartScheduler()
403 /* Should never get here as the tasks will now be executing! Call the task in xPortStartScheduler()
405 * not being called in the case that the application writer overrides this in xPortStartScheduler()
427 /* This is not the interrupt safe version of the enter critical function so in vPortEnterCritical()
430 * the critical nesting count is 1 to protect against recursive calls if the in vPortEnterCritical()
458 /* The function is not truly naked, so add back the 4 bytes subtracted in xPortPendSVHandler()
459 * from the stack pointer by the function prologue. */ in xPortPendSVHandler()
465 ldr r3, =_pxCurrentTCB /* Get the location of the current TCB. */ in xPortPendSVHandler()
468 tst r14, #0x10 /* Is the task using the FPU context? If so, push high vfp registers. */ in xPortPendSVHandler()
472 stmdb r0 !, ( r4 - r11, r14 ) /* Save the core registers. */ in xPortPendSVHandler()
474 … str r0, [ r2 ] /* Save the new top of stack into the first member of the TCB. */ in xPortPendSVHandler()
487 ldr r1, [ r3 ] /* The first item in pxCurrentTCB is the task top of stack. */ in xPortPendSVHandler()
490 ldm r0 !, ( r4 - r11, r14 ) /* Pop the core registers. */ in xPortPendSVHandler()
492 …tst r14, #0x10 /* Is the task using the FPU context? If so, pop the high vfp register… in xPortPendSVHandler()
506 /* The SysTick runs at the lowest interrupt priority, so when this interrupt in xPortSysTickHandler()
508 * save and then restore the interrupt mask value as its value is already in xPortSysTickHandler()
509 * known - therefore the slightly faster portDISABLE_INTERRUPTS() function is in xPortSysTickHandler()
514 /* Increment the RTOS tick. */ in xPortSysTickHandler()
520 * the PendSV interrupt. Pend the PendSV interrupt. */ in xPortSysTickHandler()
539 /* Make sure the SysTick reload value does not overflow the counter. */ in vPortSuppressTicksAndSleep()
545 /* Enter a critical section but don't use the taskENTER_CRITICAL() in vPortSuppressTicksAndSleep()
557 /* If a context switch is pending or a task is waiting for the scheduler in vPortSuppressTicksAndSleep()
558 * to be unsuspended then abandon the low power entry. */ in vPortSuppressTicksAndSleep()
561 /* Re-enable interrupts - see comments above the cpsid instruction in vPortSuppressTicksAndSleep()
569 /* Stop the SysTick momentarily. The time the SysTick is stopped for in vPortSuppressTicksAndSleep()
570 * is accounted for as best it can be, but using the tickless mode will in vPortSuppressTicksAndSleep()
571 * inevitably result in some tiny drift of the time maintained by the in vPortSuppressTicksAndSleep()
575 /* Use the SysTick current-value register to determine the number of in vPortSuppressTicksAndSleep()
576 * SysTick decrements remaining until the next tick interrupt. If the in vPortSuppressTicksAndSleep()
578 * ulTimerCountsForOneTick decrements remaining, not zero, because the in vPortSuppressTicksAndSleep()
579 * SysTick requests the interrupt when decrementing from 1 to 0. */ in vPortSuppressTicksAndSleep()
587 /* Calculate the reload value required to wait xExpectedIdleTime in vPortSuppressTicksAndSleep()
589 * way through the first tick period. But if the SysTick IRQ is now in vPortSuppressTicksAndSleep()
590 * pending, then clear the IRQ, suppressing the first tick, and correct in vPortSuppressTicksAndSleep()
591 * the reload value to reflect that the second tick period is already in vPortSuppressTicksAndSleep()
592 * underway. The expected idle time is always at least two ticks. */ in vPortSuppressTicksAndSleep()
606 /* Set the new reload value. */ in vPortSuppressTicksAndSleep()
609 /* Clear the SysTick count flag and set the count value back to in vPortSuppressTicksAndSleep()
619 * should not be executed again. However, the original expected idle in vPortSuppressTicksAndSleep()
639 /* Re-enable interrupts to allow the interrupt that brought the MCU in vPortSuppressTicksAndSleep()
641 * the cpsid instruction above. */ in vPortSuppressTicksAndSleep()
652 /* Disable interrupts again because the clock is about to be stopped in vPortSuppressTicksAndSleep()
653 * and interrupts that execute while the clock is stopped will increase in vPortSuppressTicksAndSleep()
654 * any slippage between the time maintained by the RTOS and calendar in vPortSuppressTicksAndSleep()
666 /* Disable the SysTick clock without reading the in vPortSuppressTicksAndSleep()
667 * portNVIC_SYSTICK_CTRL_REG register to ensure the in vPortSuppressTicksAndSleep()
669 * the time the SysTick is stopped for is accounted for as best it can in vPortSuppressTicksAndSleep()
670 * be, but using the tickless mode will inevitably result in some tiny in vPortSuppressTicksAndSleep()
671 * drift of the time maintained by the kernel with respect to calendar in vPortSuppressTicksAndSleep()
675 /* Determine whether the SysTick has already counted to zero. */ in vPortSuppressTicksAndSleep()
680 /* The tick interrupt ended the sleep (or is now pending), and in vPortSuppressTicksAndSleep()
682 * with whatever remains of the new tick period. */ in vPortSuppressTicksAndSleep()
686 * underflowed because the post sleep hook did something in vPortSuppressTicksAndSleep()
687 * that took too long or because the SysTick current-value register in vPortSuppressTicksAndSleep()
696 /* As the pending tick will be processed as soon as this in vPortSuppressTicksAndSleep()
697 * function exits, the tick value maintained by the tick is stepped in vPortSuppressTicksAndSleep()
698 * forward by one less than the time spent waiting. */ in vPortSuppressTicksAndSleep()
703 /* Something other than the tick interrupt ended the sleep. */ in vPortSuppressTicksAndSleep()
705 /* Use the SysTick current-value register to determine the in vPortSuppressTicksAndSleep()
706 * number of SysTick decrements remaining until the expected idle in vPortSuppressTicksAndSleep()
711 /* If the SysTick is not using the core clock, the current- in vPortSuppressTicksAndSleep()
712 * value register might still be zero here. In that case, the in vPortSuppressTicksAndSleep()
713 * SysTick didn't load from the reload register, and there are in vPortSuppressTicksAndSleep()
714 * ulReloadValue decrements remaining in the expected idle in vPortSuppressTicksAndSleep()
723 /* Work out how long the sleep lasted rounded to complete tick in vPortSuppressTicksAndSleep()
724 * periods (not the ulReload value which accounted for part in vPortSuppressTicksAndSleep()
728 /* How many complete tick periods passed while the processor in vPortSuppressTicksAndSleep()
732 /* The reload value is set to whatever fraction of a single tick in vPortSuppressTicksAndSleep()
739 * the SysTick is not using the core clock, temporarily configure it to in vPortSuppressTicksAndSleep()
740 * use the core clock. This configuration forces the SysTick to load in vPortSuppressTicksAndSleep()
741 * from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next in vPortSuppressTicksAndSleep()
742 * cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready in vPortSuppressTicksAndSleep()
743 * to receive the standard value immediately. */ in vPortSuppressTicksAndSleep()
752 /* The temporary usage of the core clock has served its purpose, in vPortSuppressTicksAndSleep()
753 * as described above. Resume usage of the other clock. */ in vPortSuppressTicksAndSleep()
758 /* The partial tick period already ended. Be sure the SysTick in vPortSuppressTicksAndSleep()
768 /* Step the tick to account for any tick periods that elapsed. */ in vPortSuppressTicksAndSleep()
782 * Setup the systick timer to generate the tick interrupts at the required
789 /* Calculate the constants required to configure the tick interrupt. */ in vPortSetupTimerInterrupt()
802 /* Configure SysTick to interrupt at the requested rate. */ in vPortSetupTimerInterrupt()
815 ldr r0, =0xE000ED88 /* The FPU enable bits are in the CPACR. */ in vPortEnableVFP()
830 /* Obtain the number of the currently executing interrupt. */ in xPortIsInsideInterrupt()
846 /* Limitations in the MikroC inline asm means ulCurrentInterrupt has to be
856 /* Obtain the number of the currently executing interrupt. */ in vPortValidateInterruptPriority()
867 /* Is the interrupt number a user defined interrupt? */ in vPortValidateInterruptPriority()
870 /* Look up the interrupt's priority. */ in vPortValidateInterruptPriority()
873 /* The following assertion will fail if a service routine (ISR) for in vPortValidateInterruptPriority()
881 * interrupt priorities, therefore the priority of the interrupt must in vPortValidateInterruptPriority()
885 * Interrupts that use the FreeRTOS API must not be left at their in vPortValidateInterruptPriority()
886 * default priority of zero as that is the highest possible priority, in vPortValidateInterruptPriority()
893 * The following links provide detailed information: in vPortValidateInterruptPriority()
899 /* Priority grouping: The interrupt controller (NVIC) allows the bits in vPortValidateInterruptPriority()
901 * define the interrupt's pre-emption priority bits and bits that define in vPortValidateInterruptPriority()
902 * the interrupt's sub-priority. For simplicity all bits must be defined in vPortValidateInterruptPriority()
903 * to be pre-emption priority bits. The following assertion will fail if in vPortValidateInterruptPriority()
904 * this is not the case (if some bits represent a sub-priority). in vPortValidateInterruptPriority()
906 * If the application only uses CMSIS libraries for interrupt in vPortValidateInterruptPriority()
907 * configuration then the correct setting can be achieved on all Cortex-M in vPortValidateInterruptPriority()
908 * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the in vPortValidateInterruptPriority()