Lines Matching +full:- +full:s

2  * The FreeRTOS kernel's RISC-V port is split between the the code that is
3  * common across all currently supported RISC-V chips (implementations of the
4  * RISC-V ISA), and code that tailors the port to a specific RISC-V chip:
6  * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that
7  *   is common to all currently supported RISC-V chips.  There is only one
8  *   portASM.S file because the same file is built for all RISC-V target chips.
11  *   code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V
13  *   as there are multiple RISC-V chip implementations.
17  * HEADER FILE FOR THE CHIP IN USE.  This is done using the assembler's (not the
18  * compiler's!) include path.  For example, if the chip in use includes a core
20  * extensions then add the path below to the assembler's include path:
21  * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions