Lines Matching refs:load_x

110     load_x a0, pullMachineTimerCompareRegister  /* Load address of compare register into a0. */
111     load_x a1, pullNextTime                     /* Load the address of ullNextTime into a1. */
225     load_x t0, xTaskReturnAddress
241     load_x  sp, pxCurrentTCB            /* Load pxCurrentTCB. */
242     load_x  sp, 0( sp )                 /* Read sp from first TCB member. */
244 …load_x  x1, 0( sp ) /* Note for starting the scheduler the exception return address is used as the…
248     load_x  x7, 4 * portWORD_SIZE( sp )     /* t2 */
249     load_x  x8, 5 * portWORD_SIZE( sp )     /* s0/fp */
250     load_x  x9, 6 * portWORD_SIZE( sp )     /* s1 */
251     load_x  x10, 7 * portWORD_SIZE( sp )    /* a0 */
252     load_x  x11, 8 * portWORD_SIZE( sp )    /* a1 */
253     load_x  x12, 9 * portWORD_SIZE( sp )    /* a2 */
254     load_x  x13, 10 * portWORD_SIZE( sp )   /* a3 */
255     load_x  x14, 11 * portWORD_SIZE( sp )   /* a4 */
256     load_x  x15, 12 * portWORD_SIZE( sp )   /* a5 */
258     load_x  x16, 13 * portWORD_SIZE( sp )   /* a6 */
259     load_x  x17, 14 * portWORD_SIZE( sp )   /* a7 */
260     load_x  x18, 15 * portWORD_SIZE( sp )   /* s2 */
261     load_x  x19, 16 * portWORD_SIZE( sp )   /* s3 */
262     load_x  x20, 17 * portWORD_SIZE( sp )   /* s4 */
263     load_x  x21, 18 * portWORD_SIZE( sp )   /* s5 */
264     load_x  x22, 19 * portWORD_SIZE( sp )   /* s6 */
265     load_x  x23, 20 * portWORD_SIZE( sp )   /* s7 */
266     load_x  x24, 21 * portWORD_SIZE( sp )   /* s8 */
267     load_x  x25, 22 * portWORD_SIZE( sp )   /* s9 */
268     load_x  x26, 23 * portWORD_SIZE( sp )   /* s10 */
269     load_x  x27, 24 * portWORD_SIZE( sp )   /* s11 */
270     load_x  x28, 25 * portWORD_SIZE( sp )   /* t3 */
271     load_x  x29, 26 * portWORD_SIZE( sp )   /* t4 */
272     load_x  x30, 27 * portWORD_SIZE( sp )   /* t5 */
273     load_x  x31, 28 * portWORD_SIZE( sp )   /* t6 */
276 …load_x  x5, portCRITICAL_NESTING_OFFSET * portWORD_SIZE( sp )    /* Obtain xCriticalNesting value …
277     load_x  x6, pxCriticalNesting           /* Load the address of xCriticalNesting into x6. */
280     load_x  x5, portMSTATUS_OFFSET * portWORD_SIZE( sp )    /* Initial mstatus into x5 (t0). */
284     load_x  x5, 2 * portWORD_SIZE( sp )     /* Initial x5 (t0) value. */
285     load_x  x6, 3 * portWORD_SIZE( sp )     /* Initial x6 (t1) value. */
356     load_x sp, xISRStackTop             /* Switch to ISR stack. */
362     load_x sp, xISRStackTop             /* Switch to ISR stack. */