Lines Matching refs:LDR
49 LDR R2, = ulCriticalNesting
50 LDR R1, [ R2 ]
59 LDR R2, = ulPortTaskHasFPUContext variable
60 LDR R3, [ R2 ]
87 LDR R0, = pxCurrentTCB
88 LDR R1, [ R0 ]
99 LDR R0, = pxCurrentTCB
100 LDR R1, [ R0 ]
101 LDR SP, [ R1 ]
107 LDR R0, = ulPortTaskHasFPUContext
132 LDR R0, = ulCriticalNesting
142 LDR R2, = portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS