Lines Matching full:the
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 * Implementation of functions defined in portable.h for the ARM CM7 port.
38 …#error This port can only be used when the project options are configured to enable hardware float…
44 /* Constants required to manipulate the core. Registers first... */
50 /* ...then bits in the registers. */
63 /* Constants used to check the installation of the FreeRTOS interrupt handlers. */
68 /* Constants required to check the validity of an interrupt priority. */
78 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
81 /* Constants required to manipulate the VFP. */
85 /* Constants required to set up the initial stack. */
89 /* The systick is a 24-bit counter. */
92 /* For strict compliance with the Cortex-M spec the task start address should
93 * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
96 /* A fiddle factor to estimate the number of SysTick counts that would have
97 * occurred while the SysTick counter is stopped during tickless idle
101 /* Let the user override the default SysTick clock rate. If defined by the
102 * user, this symbol must equal the SysTick clock rate when the CLK bit is 0 in the
106 /* Ensure the SysTick is clocked at the same frequency as the core. */
109 /* Select the option to clock SysTick not at the same frequency as the core. */
113 /* Let the user override the pre-loading of the initial LR with the address of
114 * prvTaskExitError() in case it messes up unwinding of the stack in the
123 * Setup the timer to generate the tick interrupts. The implementation in this
124 * file is weak to allow application writers to change the timer used to
125 * generate the tick interrupt.
142 * Function to enable the VFP.
153 /* Each task maintains its own interrupt status in the critical nesting
158 * The number of SysTick increments that make up one tick period.
165 * The maximum number of tick periods that can be suppressed is limited by the
166 * 24 bit resolution of the SysTick timer.
173 * Compensate for the CPU cycles that pass while the SysTick is stopped (low
181 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
200 /* Simulate the stack frame as it would be created by a context switch in pxPortInitialiseStack()
203 /* Offset added to account for the way the MCU uses the stack on entry/exit in pxPortInitialiseStack()
237 * defined, then stop here so application writers can catch the error. */ in prvTaskExitError()
243 /* This file calls prvTaskExitError() after the scheduler has been in prvTaskExitError()
244 * started to remove a compiler warning about the function being defined in prvTaskExitError()
247 * volatile makes the compiler think the function could return and in prvTaskExitError()
257 " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */ in vPortSVCHandler()
258 …" ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. … in vPortSVCHandler()
259 …" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack… in vPortSVCHandler()
260 …ia r0!, {r4-r11, r14} \n" /* Pop the registers that are not automatically saved on exceptio… in vPortSVCHandler()
261 " msr psp, r0 \n" /* Restore the task stack pointer. */ in vPortSVCHandler()
275 /* Start the first task. This also clears the bit that indicates the FPU is in prvPortStartFirstTask()
276 * in use in case the FPU was used before the scheduler was started - which in prvPortStartFirstTask()
277 * would otherwise result in the unnecessary leaving of space in the SVC stack in prvPortStartFirstTask()
280 " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */ in prvPortStartFirstTask()
283 " msr msp, r0 \n" /* Set the msp back to the start of the stack. */ in prvPortStartFirstTask()
284 …" mov r0, #0 \n" /* Clear the bit that indicates the FPU is in use, see comment above. … in prvPortStartFirstTask()
302 /* An application can install FreeRTOS interrupt handlers in one of the in xPortStartScheduler()
304 * 1. Direct Routing - Install the functions vPortSVCHandler and in xPortStartScheduler()
318 /* Validate that the application has correctly installed the FreeRTOS in xPortStartScheduler()
319 * handlers for SVCall and PendSV interrupts. We do not check the in xPortStartScheduler()
320 * installation of the SysTick handler because the application may in xPortStartScheduler()
321 * choose to drive the RTOS tick using a timer other than the SysTick in xPortStartScheduler()
322 * timer by overriding the weak function vPortSetupTimerInterrupt(). in xPortStartScheduler()
324 * Assertion failures here indicate incorrect installation of the in xPortStartScheduler()
325 * FreeRTOS handlers. For help installing the FreeRTOS handlers, see in xPortStartScheduler()
328 * Systems with a configurable address for the interrupt vector table in xPortStartScheduler()
330 * VTOR is not set correctly to point to the application's vector table. */ in xPortStartScheduler()
343 /* Determine the maximum priority from which ISR safe FreeRTOS API in xPortStartScheduler()
348 * Save the interrupt priority value that is about to be clobbered. */ in xPortStartScheduler()
351 /* Determine the number of priority bits available. First write to all in xPortStartScheduler()
355 /* Read the value back to see how many bits stuck. */ in xPortStartScheduler()
358 /* Use the same mask on the maximum system call priority. */ in xPortStartScheduler()
361 /* Check that the maximum system call priority is nonzero after in xPortStartScheduler()
362 * accounting for the number of priority bits supported by the in xPortStartScheduler()
363 * hardware. A priority of 0 is invalid because setting the BASEPRI in xPortStartScheduler()
369 /* Check that the bits not implemented in hardware are zero in in xPortStartScheduler()
373 /* Calculate the maximum acceptable priority group value for the number in xPortStartScheduler()
384 /* When the hardware implements 8 priority bits, there is no way for in xPortStartScheduler()
385 * the software to configure PRIGROUP to not have sub-priorities. As in xPortStartScheduler()
386 * a result, the least significant bit is always used for sub-priority in xPortStartScheduler()
392 * are at the same preemption priority. This may appear confusing as in xPortStartScheduler()
396 * to 4, this confusion does not happen and the behaviour remains the same. in xPortStartScheduler()
398 * The following assert ensures that the sub-priority bit in the in xPortStartScheduler()
399 * configMAX_SYSCALL_INTERRUPT_PRIORITY is clear to avoid the above mentioned in xPortStartScheduler()
409 /* Shift the priority group value back to its position within the AIRCR in xPortStartScheduler()
414 /* Restore the clobbered interrupt priority register to its original in xPortStartScheduler()
420 /* Make PendSV and SysTick the lowest priority interrupts, and make SVCall in xPortStartScheduler()
421 * the highest priority. */ in xPortStartScheduler()
426 /* Start the timer that generates the tick ISR. Interrupts are disabled in xPortStartScheduler()
430 /* Initialise the critical nesting count ready for the first task. */ in xPortStartScheduler()
433 /* Ensure the VFP is enabled - it should be anyway. */ in xPortStartScheduler()
439 /* Start the first task. */ in xPortStartScheduler()
442 /* Should never get here as the tasks will now be executing! Call the task in xPortStartScheduler()
444 * not being called in the case that the application writer overrides this in xPortStartScheduler()
446 * vTaskSwitchContext() so link time optimisation does not remove the in xPortStartScheduler()
469 /* This is not the interrupt safe version of the enter critical function so in vPortEnterCritical()
472 * the critical nesting count is 1 to protect against recursive calls if the in vPortEnterCritical()
502 " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */ in xPortPendSVHandler()
505 …" tst r14, #0x10 \n" /* Is the task using the FPU context? If so, push hig… in xPortPendSVHandler()
509 " stmdb r0!, {r4-r11, r14} \n" /* Save the core registers. */ in xPortPendSVHandler()
510 …" str r0, [r2] \n" /* Save the new top of stack into the first member of … in xPortPendSVHandler()
524 …" ldr r1, [r3] \n" /* The first item in pxCurrentTCB is the task top of s… in xPortPendSVHandler()
527 " ldmia r0!, {r4-r11, r14} \n" /* Pop the core registers. */ in xPortPendSVHandler()
529 …" tst r14, #0x10 \n" /* Is the task using the FPU context? If so, pop the … in xPortPendSVHandler()
554 /* The SysTick runs at the lowest interrupt priority, so when this interrupt in xPortSysTickHandler()
556 * save and then restore the interrupt mask value as its value is already in xPortSysTickHandler()
561 /* Increment the RTOS tick. */ in xPortSysTickHandler()
567 * the PendSV interrupt. Pend the PendSV interrupt. */ in xPortSysTickHandler()
586 /* Make sure the SysTick reload value does not overflow the counter. */ in vPortSuppressTicksAndSleep()
592 /* Enter a critical section but don't use the taskENTER_CRITICAL() in vPortSuppressTicksAndSleep()
598 /* If a context switch is pending or a task is waiting for the scheduler in vPortSuppressTicksAndSleep()
599 * to be unsuspended then abandon the low power entry. */ in vPortSuppressTicksAndSleep()
602 /* Re-enable interrupts - see comments above the cpsid instruction in vPortSuppressTicksAndSleep()
608 /* Stop the SysTick momentarily. The time the SysTick is stopped for in vPortSuppressTicksAndSleep()
609 * is accounted for as best it can be, but using the tickless mode will in vPortSuppressTicksAndSleep()
610 * inevitably result in some tiny drift of the time maintained by the in vPortSuppressTicksAndSleep()
614 /* Use the SysTick current-value register to determine the number of in vPortSuppressTicksAndSleep()
615 * SysTick decrements remaining until the next tick interrupt. If the in vPortSuppressTicksAndSleep()
617 * ulTimerCountsForOneTick decrements remaining, not zero, because the in vPortSuppressTicksAndSleep()
618 * SysTick requests the interrupt when decrementing from 1 to 0. */ in vPortSuppressTicksAndSleep()
626 /* Calculate the reload value required to wait xExpectedIdleTime in vPortSuppressTicksAndSleep()
628 * way through the first tick period. But if the SysTick IRQ is now in vPortSuppressTicksAndSleep()
629 * pending, then clear the IRQ, suppressing the first tick, and correct in vPortSuppressTicksAndSleep()
630 * the reload value to reflect that the second tick period is already in vPortSuppressTicksAndSleep()
631 * underway. The expected idle time is always at least two ticks. */ in vPortSuppressTicksAndSleep()
645 /* Set the new reload value. */ in vPortSuppressTicksAndSleep()
648 /* Clear the SysTick count flag and set the count value back to in vPortSuppressTicksAndSleep()
658 * should not be executed again. However, the original expected idle in vPortSuppressTicksAndSleep()
672 /* Re-enable interrupts to allow the interrupt that brought the MCU in vPortSuppressTicksAndSleep()
674 * the cpsid instruction above. */ in vPortSuppressTicksAndSleep()
679 /* Disable interrupts again because the clock is about to be stopped in vPortSuppressTicksAndSleep()
680 * and interrupts that execute while the clock is stopped will increase in vPortSuppressTicksAndSleep()
681 * any slippage between the time maintained by the RTOS and calendar in vPortSuppressTicksAndSleep()
687 /* Disable the SysTick clock without reading the in vPortSuppressTicksAndSleep()
688 * portNVIC_SYSTICK_CTRL_REG register to ensure the in vPortSuppressTicksAndSleep()
690 * the time the SysTick is stopped for is accounted for as best it can in vPortSuppressTicksAndSleep()
691 * be, but using the tickless mode will inevitably result in some tiny in vPortSuppressTicksAndSleep()
692 * drift of the time maintained by the kernel with respect to calendar in vPortSuppressTicksAndSleep()
696 /* Determine whether the SysTick has already counted to zero. */ in vPortSuppressTicksAndSleep()
701 /* The tick interrupt ended the sleep (or is now pending), and in vPortSuppressTicksAndSleep()
703 * with whatever remains of the new tick period. */ in vPortSuppressTicksAndSleep()
707 * underflowed because the post sleep hook did something in vPortSuppressTicksAndSleep()
708 * that took too long or because the SysTick current-value register in vPortSuppressTicksAndSleep()
717 /* As the pending tick will be processed as soon as this in vPortSuppressTicksAndSleep()
718 * function exits, the tick value maintained by the tick is stepped in vPortSuppressTicksAndSleep()
719 * forward by one less than the time spent waiting. */ in vPortSuppressTicksAndSleep()
724 /* Something other than the tick interrupt ended the sleep. */ in vPortSuppressTicksAndSleep()
726 /* Use the SysTick current-value register to determine the in vPortSuppressTicksAndSleep()
727 * number of SysTick decrements remaining until the expected idle in vPortSuppressTicksAndSleep()
732 /* If the SysTick is not using the core clock, the current- in vPortSuppressTicksAndSleep()
733 * value register might still be zero here. In that case, the in vPortSuppressTicksAndSleep()
734 * SysTick didn't load from the reload register, and there are in vPortSuppressTicksAndSleep()
735 * ulReloadValue decrements remaining in the expected idle in vPortSuppressTicksAndSleep()
744 /* Work out how long the sleep lasted rounded to complete tick in vPortSuppressTicksAndSleep()
745 * periods (not the ulReload value which accounted for part in vPortSuppressTicksAndSleep()
749 /* How many complete tick periods passed while the processor in vPortSuppressTicksAndSleep()
753 /* The reload value is set to whatever fraction of a single tick in vPortSuppressTicksAndSleep()
760 * the SysTick is not using the core clock, temporarily configure it to in vPortSuppressTicksAndSleep()
761 * use the core clock. This configuration forces the SysTick to load in vPortSuppressTicksAndSleep()
762 * from portNVIC_SYSTICK_LOAD_REG immediately instead of at the next in vPortSuppressTicksAndSleep()
763 * cycle of the other clock. Then portNVIC_SYSTICK_LOAD_REG is ready in vPortSuppressTicksAndSleep()
764 * to receive the standard value immediately. */ in vPortSuppressTicksAndSleep()
773 /* The temporary usage of the core clock has served its purpose, in vPortSuppressTicksAndSleep()
774 * as described above. Resume usage of the other clock. */ in vPortSuppressTicksAndSleep()
779 /* The partial tick period already ended. Be sure the SysTick in vPortSuppressTicksAndSleep()
789 /* Step the tick to account for any tick periods that elapsed. */ in vPortSuppressTicksAndSleep()
801 * Setup the systick timer to generate the tick interrupts at the required
806 /* Calculate the constants required to configure the tick interrupt. */ in vPortSetupTimerInterrupt()
815 /* Stop and clear the SysTick. */ in vPortSetupTimerInterrupt()
819 /* Configure SysTick to interrupt at the requested rate. */ in vPortSetupTimerInterrupt()
830 " ldr.w r0, =0xE000ED88 \n" /* The FPU enable bits are in the CPACR. */ in vPortEnableVFP()
848 /* Obtain the number of the currently executing interrupt. */ in vPortValidateInterruptPriority()
851 /* Is the interrupt number a user defined interrupt? */ in vPortValidateInterruptPriority()
854 /* Look up the interrupt's priority. */ in vPortValidateInterruptPriority()
857 /* The following assertion will fail if a service routine (ISR) for in vPortValidateInterruptPriority()
865 * interrupt priorities, therefore the priority of the interrupt must in vPortValidateInterruptPriority()
869 * Interrupts that use the FreeRTOS API must not be left at their in vPortValidateInterruptPriority()
870 * default priority of zero as that is the highest possible priority, in vPortValidateInterruptPriority()
877 * The following links provide detailed information: in vPortValidateInterruptPriority()
883 /* Priority grouping: The interrupt controller (NVIC) allows the bits in vPortValidateInterruptPriority()
885 * define the interrupt's pre-emption priority bits and bits that define in vPortValidateInterruptPriority()
886 * the interrupt's sub-priority. For simplicity all bits must be defined in vPortValidateInterruptPriority()
887 * to be pre-emption priority bits. The following assertion will fail if in vPortValidateInterruptPriority()
888 * this is not the case (if some bits represent a sub-priority). in vPortValidateInterruptPriority()
890 * If the application only uses CMSIS libraries for interrupt in vPortValidateInterruptPriority()
891 * configuration then the correct setting can be achieved on all Cortex-M in vPortValidateInterruptPriority()
892 * devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the in vPortValidateInterruptPriority()