5  * SPDX-License-Identifier: MIT
29 /*-----------------------------------------------------------
31 *----------------------------------------------------------*/
38 …LL_INTERRUPT_PRIORITY must not be set to 0.  See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
75 /* The systick is a 24-bit counter. */
83 /* For strict compliance with the Cortex-M spec the task start address should
84  * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
121 /*-----------------------------------------------------------*/
165 /*-----------------------------------------------------------*/
177     /* Offset added to account for the way the MCU uses the stack on entry/exit  in pxPortInitialiseStack()
179     pxTopOfStack--;  in pxPortInitialiseStack()
182     pxTopOfStack--;  in pxPortInitialiseStack()
184     pxTopOfStack--;  in pxPortInitialiseStack()
188     pxTopOfStack -= 5;                            /* R12, R3, R2 and R1. */  in pxPortInitialiseStack()
191     pxTopOfStack -= 8;                            /* R11, R10, R9, R8, R7, R6, R5 and R4. */  in pxPortInitialiseStack()
195 /*-----------------------------------------------------------*/
212 /*-----------------------------------------------------------*/
241         /* Use the same mask on the maximum system call priority. */  in xPortStartScheduler()
249          * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */  in xPortStartScheduler()
268             * the software to configure PRIGROUP to not have sub-priorities. As  in xPortStartScheduler()
269             * a result, the least significant bit is always used for sub-priority  in xPortStartScheduler()
270             * and there are 128 preemption priorities and 2 sub-priorities.  in xPortStartScheduler()
272             * This may cause some confusion in some cases - for example, if  in xPortStartScheduler()
281             * The following assert ensures that the sub-priority bit in the  in xPortStartScheduler()
289             ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits;  in xPortStartScheduler()
320 /*-----------------------------------------------------------*/
328 /*-----------------------------------------------------------*/
345 /*-----------------------------------------------------------*/
350     uxCriticalNesting--;  in vPortExitCritical()
357 /*-----------------------------------------------------------*/
361     /* The SysTick runs at the lowest interrupt priority, so when this interrupt  in xPortSysTickHandler()
384 /*-----------------------------------------------------------*/
410             /* Re-enable interrupts - see comments above the cpsid instruction  in vPortSuppressTicksAndSleep()
422             /* Use the SysTick current-value register to determine the number of  in vPortSuppressTicksAndSleep()
424              * current-value register is zero, then there are actually  in vPortSuppressTicksAndSleep()
435              * tick periods.  -1 is used because this code normally executes part  in vPortSuppressTicksAndSleep()
440 …lReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );  in vPortSuppressTicksAndSleep()
445                 ulReloadValue -= ulTimerCountsForOneTick;  in vPortSuppressTicksAndSleep()
450                 ulReloadValue -= ulStoppedTimerCompensation;  in vPortSuppressTicksAndSleep()
480             /* Re-enable interrupts to allow the interrupt that brought the MCU  in vPortSuppressTicksAndSleep()
512 …ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CUR…  in vPortSuppressTicksAndSleep()
516                  * that took too long or because the SysTick current-value register  in vPortSuppressTicksAndSleep()
520                     ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );  in vPortSuppressTicksAndSleep()
528                 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;  in vPortSuppressTicksAndSleep()
534                 /* Use the SysTick current-value register to determine the  in vPortSuppressTicksAndSleep()
540                     /* If the SysTick is not using the core clock, the current-  in vPortSuppressTicksAndSleep()
555 …ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecremen…  in vPortSuppressTicksAndSleep()
563 …CK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDe…  in vPortSuppressTicksAndSleep()
566             /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again,  in vPortSuppressTicksAndSleep()
577                 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;  in vPortSuppressTicksAndSleep()
592                 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;  in vPortSuppressTicksAndSleep()
606 /*-----------------------------------------------------------*/
629     portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;  in vPortSetupTimerInterrupt()
632 /*-----------------------------------------------------------*/
671              * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html  in vPortValidateInterruptPriority()
678          * define the interrupt's pre-emption priority bits and bits that define  in vPortValidateInterruptPriority()
679          * the interrupt's sub-priority.  For simplicity all bits must be defined  in vPortValidateInterruptPriority()
680          * to be pre-emption priority bits.  The following assertion will fail if  in vPortValidateInterruptPriority()
681          * this is not the case (if some bits represent a sub-priority).  in vPortValidateInterruptPriority()
684          * configuration then the correct setting can be achieved on all Cortex-M  in vPortValidateInterruptPriority()
687          * assume a non-zero priority group setting, in which cases using a value  in vPortValidateInterruptPriority()