288         gs_tx_desc[ ul_index ].status.val = GMAC_TXD_USED;  in gmac_reset_tx_mem()
292     gs_tx_desc[ GMAC_TX_BUFFERS - 1 ].status.val = GMAC_TXD_USED | GMAC_TXD_WRAP;  in gmac_reset_tx_mem()
341         gs_rx_desc[ ul_index ].addr.val = ul_address & GMAC_RXD_ADDR_MASK;  in gmac_reset_rx_mem()
342         gs_rx_desc[ ul_index ].status.val = 0;  in gmac_reset_rx_mem()
516             while( ( pxHead->addr.val & GMAC_RXD_OWNERSHIP ) &&  in gmac_dev_poll()
517                    ( pxHead->status.val & GMAC_RXD_SOF ) == 0 )  in gmac_dev_poll()
519                 pxHead->addr.val &= ~( GMAC_RXD_OWNERSHIP );  in gmac_dev_poll()
532     while( ( pxHead->addr.val & GMAC_RXD_OWNERSHIP ) != 0 )  in gmac_dev_poll()
536                 if( ( pxHead->status.val & GMAC_RXD_EOF ) != 0 )  in gmac_dev_poll()
546                 if( ( pxHead->addr.val & GMAC_RXD_OWNERSHIP ) == 0 )  in gmac_dev_poll()
552                 if( ( pxHead->status.val & GMAC_RXD_SOF ) != 0 )  in gmac_dev_poll()
561                         pxHead->addr.val &= ~( GMAC_RXD_OWNERSHIP );  in gmac_dev_poll()
576 …  if( ( pxHead->status.val & ( GMAC_RXD_SOF | GMAC_RXD_EOF ) ) == ( GMAC_RXD_SOF | GMAC_RXD_EOF ) )  in gmac_dev_poll()
672                                      ( ( ( gs_rx_desc[ nextIdx ].addr.val ) & ~( 0x03ul ) ) + 2 );  in gmac_dev_read()
687         pxHead->addr.val &= ~( GMAC_RXD_OWNERSHIP );  in gmac_dev_read()
690         if( pxHead->addr.val )  in gmac_dev_read()
695     } while( ( pxHead->status.val & GMAC_RXD_EOF ) == 0 );  in gmac_dev_read()
737     if( ( p_tx_td->status.val & GMAC_TXD_USED ) == 0 )  in gmac_dev_write()
774         p_tx_td->status.val =  in gmac_dev_write()
780         p_tx_td->status.val =  in gmac_dev_write()
784     if( p_tx_td->status.val )  in gmac_dev_write()
972                 if( ( p_tx_td->status.val & GMAC_TXD_USED ) == 0 )  in gmac_handler()